Systems, methods, and computer-readable media for synchronizing oscillators. A system can include a plurality of oscillators comprising at least a first oscillator and a second oscillator. The system can also include a plurality of antennas comprising at least a first antenna and a second antenna. Further, the system can include a first oscillator synchronizer coupling the first oscillator to the first antenna. The first oscillator synchronizer can be operative to perform a first synchronization of a first time base of the first oscillator to a second time base of the second oscillator based on a first mutual coupling signal. The first mutual coupling signal can represent a first interaction between the first antenna and the second antenna.

Systems, methods, and computer-readable media for synchronizing oscillators. A system can include a plurality of oscillators comprising at least a first oscillator and a second oscillator. The system can also include a plurality of antennas comprising at least a first antenna and a second antenna. Further, the system can include a first oscillator synchronizer coupling the first oscillator to the first antenna. The first oscillator synchronizer can be operative to perform a first synchronization of a first time base of the first oscillator to a second time base of the second oscillator based on a first mutual coupling signal. The first mutual coupling signal can represent a first interaction between the first antenna and the second antenna.

Within many applications impulse radio based ultra-wideband (IR-UWB) transmission offers significant benefits for very short range high data rate communications when compared with existing standards and protocols. In many of these applications the main design goals are very low power consumption and very low complexity design for easy integration and cost reduction. Digitally programmable IR-UWB transmitters using an on-off keying modulation scheme on a 0.13 microns CMOS process operating on 1.2V supply and yielding power consumption as low as 0.9 mW at a 10 Mbps data rate with dynamic power control are enabled. The IR-UWB transmitters support new frequency hopping techniques providing more efficient spectrum usage and dynamic allocation of the spectrum when transmitting in highly congested frequency bands. Biphasic scrambling is also introduced for spectral line reduction. Additionally, an energy detection receiver for IR-UWB is presented to similarly meet these design goals whilst being adaptable to address IR-UWB transmitter specificity.

Within many applications impulse radio based ultra-wideband (IR-UWB) transmission offers significant benefits for very short range high data rate communications when compared with existing standards and protocols. In many of these applications the main design goals are very low power consumption and very low complexity design for easy integration and cost reduction. Digitally programmable IR-UWB transmitters using an on-off keying modulation scheme on a 0.13 microns CMOS process operating on 1.2V supply and yielding power consumption as low as 0.9 mW at a 10 Mbps data rate with dynamic power control are enabled. The IR-UWB transmitters support new frequency hopping techniques providing more efficient spectrum usage and dynamic allocation of the spectrum when transmitting in highly congested frequency bands. Biphasic scrambling is also introduced for spectral line reduction. Additionally, an energy detection receiver for IR-UWB is presented to similarly meet these design goals whilst being adaptable to address IR-UWB transmitter specificity.

A multi-antenna transceiver system including a group of transceiver chips, and a reference frequency generator configured to provide a reference frequency for each transceiver chip. Each transceiver chip has a respective chip-associated (e.g., on-chip) frequency generator configured to provide a respective conversion frequency based on the reference frequency, wherein each respective conversion frequency is higher than the reference frequency. Each transceiver chip is configured to use the respective conversion frequency for on-chip frequency conversion of a transceiver signal. The reference frequency may be provided directly to each transceiver chip of the group or may be provided directly to a first transceiver chip of the group and to a second transceiver chip of the group via the first transceiver chip. The multi-antenna transceiver system may also include baseband processing circuitry configured to process transceiver signals for the transceiver chips, wherein the baseband processing circuitry may be further configured to estimate a first respective phase shift of each respective chip-associated frequency generator, and compensate the transceiver signals based on the first respective phase shifts.

A multi-antenna transceiver system including a group of transceiver chips, and a reference frequency generator configured to provide a reference frequency for each transceiver chip. Each transceiver chip has a respective chip-associated (e.g., on-chip) frequency generator configured to provide a respective conversion frequency based on the reference frequency, wherein each respective conversion frequency is higher than the reference frequency. Each transceiver chip is configured to use the respective conversion frequency for on-chip frequency conversion of a transceiver signal. The reference frequency may be provided directly to each transceiver chip of the group or may be provided directly to a first transceiver chip of the group and to a second transceiver chip of the group via the first transceiver chip. The multi-antenna transceiver system may also include baseband processing circuitry configured to process transceiver signals for the transceiver chips, wherein the baseband processing circuitry may be further configured to estimate a first respective phase shift of each respective chip-associated frequency generator, and compensate the transceiver signals based on the first respective phase shifts.

A wireless communication device comprises a first communication unit, a second communication unit and a single control unit. The first communication unit wirelessly communicates by a first communication signal according to a first communication standard. The second communication unit wirelessly communicates by a second communication signal according to a second communication standard. The second communication signal has a frequency band that overlaps with that of the first communication signal. The second communication standard is different from the first communication standard. The control unit generates a first interference suppression signal for suppressing interference in the second communication signal and a second interference suppression signal for suppressing interference in the first communication signal, and suppresses the interference in the first communication signal and the interference in the second communication signal based on the first interference suppression signal and the second interference suppression signal.

The present disclosure provides a communication chip, which is applied to a terminal device and includes a system control module, a radio frequency signal processing module, a first baseband processing module, and a second baseband processing module, where the system control module is respectively connected to the radio frequency signal processing module, the first baseband processing module and the second baseband processing module; the radio frequency signal processing module is further respectively connected to the first baseband processing module and the second baseband processing module.

In one example, a remote tuner module includes: a first tuner to receive, process and demodulate a first radio frequency (RF) signal to output an analog audio signal, and to receive and process a second RF signal to output a first downconverted modulated signal; a second tuner to receive and process the second RF signal to output a second downconverted modulated signal; a demodulator circuit coupled to the first and second tuners to demodulate and link the first and second modulated signals, to output a linked demodulated signal. The remote tuner module may further include a gateway circuit coupled to at least the demodulator circuit to output the analog audio signal and the linked demodulated signal.

A phase synchronization circuit which includes a first delay circuit for adjusting a first delay amount, delaying a first reference clock signal by the first delay amount, and outputting a first delayed reference clock signal. The phase synchronization circuit further includes a first clock control circuit that compares phases of the first delayed reference clock signal and a first output clock signal and generates a first clock control signal based on a result of the comparison; a first clock signal generation circuit that generates the first output clock signal based on the first clock control signal; and a first monitoring circuit that monitors jitter in the first output clock signal and adjusts the first delay amount based on a result of monitoring the jitter in the first output clock signal.