A filter includes two series arm resonators electrically connected in series between two input/output terminals, a parallel arm resonator electrically connected between a ground and a series arm between the two series arm resonators, an inductor electrically connected in parallel to the two series arm resonators, and a matching circuit electrically connected between one of the two series arm resonators and one of the input/output terminals, wherein the two series arm resonators and the parallel arm resonator define a pass band of a bandpass filter, the two series arm resonators and the inductor define an LC resonant circuit, respective anti-resonant frequencies of each of the two series arm resonators and a resonant frequency of the parallel arm resonator are located in a pass band of the LC resonant circuit, and a resonant frequency of the LC resonant circuit is lower than the resonant frequency of the parallel arm resonator.

Front-end architecture having split triplexers for carrier aggregation and MIMO support. In some embodiments, a multiplexing architecture can include an assembly of filters configured to support carrier aggregation with one or more antennas. The assembly of filters can include a first triplexer configured to support a low-band, a mid-band, and a first high-band. The assembly of filters can further include a second triplexer configured to support the low-band, the mid-band, and a second high-band. The multiplexing architecture can further include a switch assembly implemented between the assembly of filters and respective one or more nodes associated with the one or more antennas.

Front-end architecture having split diplexers for carrier aggregation and MIMO support. In some embodiments, a multiplexing architecture can include an assembly of filters configured to support carrier aggregation with one or more antennas. The assembly of filters can include a first diplexer configured to support a mid-band and a first high-band. The assembly of filters can further include a second diplexer configured to support the mid-band and a second high-band. The multiplexing architecture can further include a switch assembly implemented between the assembly of filters and respective one or more nodes associated with the one or more antennas.

A multiplexer includes: a low-pass filter that is connected between a common terminal and a first terminal and is formed of one or more first inductors and one or more first capacitors; a bandpass filter that is connected between the common terminal and a second terminal, has a passband higher than a passband of the low-pass filter, and is formed of one or more second inductors and one or more second capacitors; a high-pass filter that is connected between the common terminal and a third terminal, has a passband higher than the passband of the bandpass filter, and is formed of one or more third inductors and one or more third capacitors; and a fourth inductor that has a first end coupled to the common terminal and a second end coupled to the high-pass filter.

A linear, low noise, high quality factor (Q) and widely tunable notch filter circuit includes one or more first reactive elements coupled between a first filter node and a first node. The notch filter circuit further includes a multi-branch circuit having multiple parallel branches and coupled between the first node and a second node. Each branch of the multi-branch circuit includes at least a switch coupled to a variable capacitor. A notch frequency of the notch filter circuit is tunable by adjusting a capacitance of the variable capacitor.

A filter includes two series arm resonators electrically connected in series between two input/output terminals, a parallel arm resonator electrically connected between a ground and a series arm between the two series arm resonators, an inductor electrically connected in parallel to the two series arm resonators, and a matching circuit electrically connected between one of the two series arm resonators and one of the input/output terminals, wherein the two series arm resonators and the parallel arm resonator define a pass band of a bandpass filter, the two series arm resonators and the inductor define an LC resonant circuit, respective anti-resonant frequencies of each of the two series arm resonators and a resonant frequency of the parallel arm resonator are located in a pass band of the LC resonant circuit, and a resonant frequency of the LC resonant circuit is lower than the resonant frequency of the parallel arm resonator.

According to one embodiment, a transmitter includes a 1st circuit configured to execute a 1st band limitation by waveform shaping in a time region with respect to 1st data relating to a 1st channel to generate a 1st signal; a 2nd circuit configured to execute a 2nd band limitation by the waveform shaping in the time region with respect to 2nd data relating to a 2nd channel to generate a 2nd signal; a 3rd circuit configured to generate a 3rd signal based on the 1st signal and a 1st frequency relating to the 1st channel; a 4th circuit configured to generate a 4th signal based on the 2nd signal and a 2nd frequency relating to the 2nd channel; and a 5th circuit configured to generate a 5th signal by multiplexing the 3rd signal and the 4th signal.

Aspects of this disclosure relate to a filter for a carrier aggregation system. The filter is configured to pass a first band of a carrier aggregation signal. The filter includes a surface acoustic wave device that includes a quartz substrate, an interdigital transducer electrode, and a lithium-based piezoelectric layer positioned between the quartz substrate and the interdigital transducer electrode. The surface acoustic wave device is configured to suppress a higher order spurious mode corresponding to a second band of the carrier aggregation signal.

An electronic component includes: a first substrate having a first surface; a second substrate having a second surface facing the first surface across an air gap; a first coil pattern that is located on the first surface so as to face the second surface across the air gap; a second coil pattern that is located in a second region on the second surface and faces the first surface across the air gap, at least a part of the second region overlapping with a first region in plan view, the first region being formed of a region in which the first coil pattern is located and a region surrounded by the first coil pattern; and a connection terminal connecting the first coil pattern and the second coil pattern.

Front-end architecture having quadplexer for carrier aggregation and MIMO support. In some embodiments, a front-end architecture can include a quadplexer configured to support uplink carrier aggregation with a first antenna. The quadplexer can include a low-band filter, a mid-band filter, a first high-band filter, and a second high-band filter, with each filter having a respective input node, and the quadplexer including a common output node associated with the first antenna. The front-end architecture can further include a triplexer configured to support uplink carrier aggregation with a second antenna. The triplexer can include a mid-band filter, a first high-band filter, and a second high-band filter, with each filter having a respective input node, and the triplexer including a common output node associated with the second antenna.