A method may include determining an alignment time based on a zero-crossing point corresponding to a LiDAR sensor and a horizontal field of view corresponding to an image-capturing sensor. The method may include determining a delay timing for initiating image capturing by the image-capturing sensor in which the delay timing is based on at least one of: the alignment time, a packet capture timing corresponding to the LiDAR sensor, and an average frame exposure duration corresponding to the image-capturing sensor. The method may include initiating data capture by the LiDAR sensor, and after the initiating of data capture by the LiDAR sensor and after the delay timing has elapsed, initiating data capture by the image-capturing sensor.

A method may include obtaining sensor data from one or more LiDAR units and determining a point-cloud corresponding to the sensor data obtained from each respective LiDAR unit. The method may include aggregating the point-clouds as an aggregated point-cloud and generating an initial proposal for a two-dimensional ground model made of multiple grid blocks. The method may include filtering out unrelated raw data points from each grid block of the plurality of grid blocks to generate a filtered point-cloud matrix. The method may include identifying one or more surface-points and one or more object-points included in the filtered point-cloud matrix and generating an array of extracted objects based on the object-points.

A method for configuring a time division duplex (TDD) of a user equipment in a communication system, according to one embodiment of the present invention, comprises the steps of: receiving from a base station a first TDD configuration; receiving from the base station a message including information related to a dynamic TDD configuration; receiving a second TDD configuration according to the received information related to the dynamic TDD configuration; receiving from the base station an uplink grant; and determining whether to apply the first TDD configuration or the second TDD configuration based on a method by which the unlink grant is received. According to one embodiment of the present invention, the advantages of configuring a shorter cycle of the TDD to the user equipment supporting the TDD in a wireless communication system, and rapidly configuring the TDD to the user equipment variably according to a communication situation are provided.

A method includes periodically inserting another AM into a data stream (DS) to obtain a second DS, and the first data stream includes a first alignment marker (AM); sending the second DS through physical lanes (PLs), where a quantity of the PLs is not equal to 2.sup.n, where the second AM's insertion period and each second AM's size is based on condition 1 or 2, where condition 1 is the quantity of the PLs, where condition 2 is condition 1 and a ratio of the second DS's rate to the first DS's rate, the second AM's insertion period and each second AM's size is an integer multiple of the quantity of the PLs, and where the second DS's rate is not less than the first DS's rate, and traffic per unit time corresponding to the rate of the second DS is an integer multiple of the quantity of the PLs.

Methods and systems are described for sequentially obtaining a plurality of data streams, the plurality of data streams comprising a data stream in a current condition, a data stream in a skewed-forward condition, and a data stream in a skewed-backward condition, calculating, for each data stream in the plurality of data streams, a corresponding set of cost-function values by obtaining a corresponding set of eye measurements, the eye measurements obtained by adjusting a sampling threshold of a sampler generating a plurality of samples of the data stream, the plurality of samples comprising edge samples and data samples, wherein the data stream is sampled at a rate equal to twice a rate of the data stream and calculating the corresponding set of cost-function values based on the corresponding set of eye measurements, and generating a skew control signal based on a comparison of the sets of calculated cost-function values.

The invention concerns a circuit for transferring a data from one clock domain to another clock domain, the circuit comprising: a digital circuit configured to generate a data signal synchronized with a source clock signal, and to receive such data by sampling the data signal synchronized with a target clock signal; a phase comparator which is configured to determine a phase relationship between the source clock signal and the target clock signal; and a data signal synchronization circuit configured to receive data signal transitions that are synchronized with the source clock signal, and to provide a synchronized data signal transitions of which are synchronized with the target clock signal.

An electronic circuit for converting a signal between digital and analog in a burst mode, including a processor configured to utilize a synchronizing clock signal, a converter configured to convert a signal data between digital and analog using a converter clock signal, a phase comparator configured to determine a phase relationship between the synchronizing clock signal and the converter clock signal, and a digital signal processor coupled to the phase comparator and configured to receive an information about the phase relationship, wherein the digital signal processor is configured to apply a delay to the signal data being exchanged between the processor and. The synchronizing clock signal and the converter clock signal have a predetermined frequency relationship.

A signaling system is disclosed. The signaling system includes a first integrated circuit (IC) chip to receive a data signal and a strobe signal. The first IC includes circuitry to sample the data signal at times indicated by the strobe signal to generate phase error information and circuitry to output the phase error information from the first IC device. The system further includes a signaling link and a second IC chip coupled to the first IC chip via the signaling link to output the data signal and the strobe signal to the first IC chip. The second IC chip includes delay circuitry to generate the strobe signal by delaying an aperiodic timing signal for a first time interval and timing control circuitry to receive the phase error information from the first IC chip and adjust the first time interval in accordance with the phase error information.

A synchronization control device receives a trigger signal as input, outputs a first output signal for presenting a specific sensing target of a first sensor at a first time point corresponding to an input time point of the trigger signal, to a first device that presents the specific sensing target of the first sensor, and outputs a second output signal that instructs start of sensing in a second sensor different from the first sensor at a second time point corresponding to the input time point of the trigger signal, to the second sensor.

A circuit includes signal conditioner circuitry, level shifter circuitry, and state detector and controller circuitry coupled between the signal conditioner circuitry and the level shifter circuitry. The state detector and controller circuitry includes receiver circuitry and a finite state machine coupled to the receiver circuitry. The finite state machine is configured to detect a first data rate from signals, control operation of the signal conditioner circuitry responsive to detecting the first data rate, and control operation of the level shifter circuitry during a second data rate.