An input/output (I/O) and control system for long distance communications and industrial applications having a bus and protocol for communications between field devices and a channel generator for monitoring and control of the field devices. The channel generator produces an offset square wave of configurable frequency on the bus, and sends a synchronization pulse of selected duration at the start of each bus scan cycle in a pulse train cycle to reset counters in the field devices before the bus scan cycle is repeated, to ensure field devices are synchronized, transmitters transmit on the correct channel, and receivers sample the pulse cycle at the correct time. Changing the synchronization pulse length increases bandwidth for shorter, less noisy and more stable systems and inversely decreases bandwidth for increased noise immunity and distance for longer, noisier and less stable systems.

A data processing system includes a universal asynchronous receive/transmit (UART) module and timer module. The UART module has a first input terminal for receiving an input clock signal, a second input terminal for receiving a receive data signal, and an output terminal for providing a transmit data signal. The receive data signal and the transmit data signal use a baud rate based clock signal determined using the input clock signal, and wherein the output terminal and the second input terminal are coupled together for communicating data with a universal synchronous asynchronous receiver/transmitter (USART) module. The timer module is coupled to receive the input clock signal. The timer module provides a duplicate baud rate clock signal for communication to the USART module. The duplicate baud rate clock signal is substantially the same as the baud rate based clock signal.

Systems, methods, and apparatuses are discussed that enable robust, high-speed communication of sensor data. One example system includes a sensor bus, an electronic control unit (ECU), and one or more sensors. The ECU is coupleable to the sensor bus and configured to generate a synchronization signal, and is configured to output the synchronization signal to the sensor bus. The one or more sensors are also coupleable to the sensor bus, and at least one sensor of the one or more sensors is configured to sample sensor data in response to the synchronization signal and to output the sampled sensor data to the sensor bus.

A serial transmitter that outputs one symbol every unit interval (UI) from a data source is presented. The serial transmitter includes a serial output port that outputs one symbol every unit interval (UI) from a data source. The serial transmitter also includes a plurality of driver segments that jointly drive the serial output port. Each driver segment is configured to use one of N phases of a sampling clock to serialize and transmit data from the data source. Different sets of the driver segments are configured to use different phases of the sampling clock for serializing and transmitting data, the sampling clock being a half-rate clock having a period of two UI.

An apparatus and method for processing a data signal transferred using a specific data protocol, DP, said apparatus comprising a decoding unit configured to decode stepwise the data signal according to the used data protocol, wherein said decoding unit is adapted to decode in a decoding step rising and falling signal edges as an intermediate decoding result; and a decoding result labelling unit configured to provide intermediate decoding result labels, L, for the data signal, DS, after each decoding step performed by said decoding unit and configured to map the provided decoding result labels, L, to the data signal, DS.

A data processing system includes a universal asynchronous receive/transmit (UART) module and timer module. The UART module has a first input terminal for receiving an input clock signal, a second input terminal for receiving a receive data signal, and an output terminal for providing a transmit data signal. The receive data signal and the transmit data signal use a baud rate based clock signal determined using the input clock signal, and wherein the output terminal and the second input terminal are coupled together for communicating data with a universal synchronous asynchronous receiver/transmitter (USART) module. The timer module is coupled to receive the input clock signal. The timer module provides a duplicate baud rate clock signal for communication to the USART module. The duplicate baud rate clock signal is substantially the same as the baud rate based clock signal.

A semiconductor device is used as one of a plurality of slaves connected in multiple stages to a master and transmits a frame signal output from the master sequentially from a preceding stage to a subsequent stage. The frame signal includes synchronization bits and a message string (for example, command bits, address bits, and guard bits) following the synchronization bits. The semiconductor device includes a logic circuit configured to sample the frame signal at a baud rate corresponding to the synchronization bits and an output stage configured to through-outputs the synchronization bits before sampling without passing them through the logic circuit.

The invention relates to a method for transmitting an actuation signal and a first data signal between a control device and an actuation device of a power semiconductor device. To minimize the expenditure for the operation of the physical transmission channels and the costs for the laying of the physical connection between control device and actuation device, the transmission of the actuation signal and the first data signal between the control device and the actuation device takes place simultaneously and via a common transmission channel, wherein the first data signal is combined with the actuation signal by means of a digital modulation method or coding method. A feedback signal and second data signal are transmitted in the opposite direction. A first coding length is shorter than the interval length of the actuation signal. A second coding length is shorter than the interval length of the feedback signal.

A receiver configuration for a control unit in a vehicle having a voltage generator for generating a synchronization pulse, which includes a first voltage source, a current source and a current sink, the voltage generator generating the synchronization pulse within predefined specification limits having a predefined shape and a predefined time behavior, and the receiver configuration outputting the synchronization pulse for synchronizing a signal transmission via a databus to at least one sensor. A method is also provided for generating a synchronization pulse. The voltage generator generates the synchronization pulse via the current source and the current sink by charging and/or discharging a bus load essentially as a sinusoidal oscillation.

A serial transmitter that outputs one symbol every unit interval (UI) from a data source is presented. The serial transmitter includes a serial output port that outputs one symbol every unit interval (UI) from a data source. The serial transmitter also includes a plurality of driver segments that jointly drive the serial output port. Each driver segment is configured to use one of N phases of a sampling clock to serialize and transmit data from the data source. Different sets of the driver segments are configured to use different phases of the sampling clock for serializing and transmitting data, the sampling clock being a half-rate clock having a period of two UI.