The present disclosure provides a method, a system, and an apparatus for data communication in an optical network system. A new encoding scheme is implemented in the following manner: performing 32-bit to 34-bit encoding on a data stream on which 8-bit/10-bit decoding has been performed, performing forward error correction encoding on the data stream on which the 32-bit to 34-bit encoding has been performed, and sending the encoded data stream; or performing forward error correction decoding on a received data stream, and performing 32-bit to 34-bit decoding on the data stream on which the forward error correction decoding has been performed. In this way, a bandwidth resource of a line is saved; line monitoring can be implemented without interrupting a service, which is easy to implement and greatly improves various types of performance of the system.

Advanced detectors for vector signaling codes are disclosed which utilize multi-input comparators, generalized on-level slicing, reference generation based on maximum swing, and reference generation based on recent values. Vector signaling codes communicate information as groups of symbols which, when transmitted over multiple communications channels, may be received as mixed sets of symbols from different transmission groups due to propagation time variations between channels. Systems and methods are disclosed which compensate receivers and transmitters for these effects and/or utilize codes having increased immunity to such variations, and circuits are described that efficiently implement their component functions.

A first set of subcarriers having signal-to-noise ratio (SNR) values that exceed a target SNR value is identified at a transmitter. A second set of subcarriers having SNR values below the target SNR value is identified. Power is iteratively reallocated from the first and second set of subcarriers to a third set of subcarriers having SNR values below the target value but closer to the target SNR value than the second set of subcarriers.

The present invention provides a receiver including a sampling circuit, a data sampling point selection circuit and a determination circuit. The sampling circuit is configured to use a clock signal to sample an input signal to generate a sampled signal, wherein a frequency of the clock signal is greater than a frequency of the input signal. The data sampling point selection circuit is configured to filter start point data to generate a filtered start point data, and to generate a data sampling point by adding an offset to the filtered start point data, wherein the start point data corresponds to a time point that a sampled value of sampled signal starts to change. The determination circuit is configured to refer to a sampled value corresponding to the data sampling point in the sampled signal to determine a logical value of a digital output signal corresponding to the input signal.

Embodiments of a mobile communication device and method for digital pre-distortion (DPD) are disclosed herein. The mobile communication device may scale a sequence of input samples by per-sample scale factors to generate a sequence of output samples for input to a power amplifier (PA), the input samples scaled to compensate for distortion of the PA. The mobile communication device may generate the scale factors based on per-sample inner products between a common weight vector and a per-sample distortion compensation vectors. The mobile communication device may generate the distortion compensation vectors based on vector outputs of predetermined distortion compensation functions. The mobile communication device may update the common weight vector based on a distortion error sequence between the sequence of output samples and a sequence of feedback samples.

A method and an apparatus for determining validity of samples for a digital pre-distortion apparatus is disclosed. It is an object of at least one embodiment to provide a method and an apparatus for determining validity of samples for a digital pre-distortion apparatus that is configured to compensate for nonlinearity of a power amplifier in an efficient manner by accurately estimating a pre-distortion coefficient with a low-capacity memory.

A signal processing circuit comprising a clip-generation-block. The clip-generation-block is configured to receive an input-signal; and determine a clip-signal that comprises only values of the input-signal that exceed a clipping-threshold. The signal processing circuit also comprises a scaling-block configured to apply a scaling-factor to the clip-signal in order to generate a scaled-clip-signal, wherein the scaling-factor is greater than one; and an adder configured to provide a clipped-signal based on a difference between the scaled-clip-signal and the input signal.

A signal processing circuit comprising a clip-generation-block. The clip-generation-block is configured to receive an input-signal; and determine a clip-signal that comprises only values of the input-signal that exceed a clipping-threshold. The signal processing circuit also comprises a scaling-block configured to apply a scaling-factor to the clip-signal in order to generate a scaled-clip-signal, wherein the scaling-factor is greater than one; and an adder configured to provide a clipped-signal based on a difference between the scaled-clip-signal and the input signal.

A transmitter according to the disclosure includes: three first driver sections; three first pre-driver sections that are provided corresponding to the respective three first driver sections, and each drive corresponding one of the first driver sections on a basis of corresponding one of three first control signals that are different from one another and each including predetermined number of signals; a second pre-driver section that operates on a basis of a second control signal that includes predetermined number of signals; and a controller that controls transition of the predetermined number of signals included in the second control signal to allow number of signals to be subjected to the transition out of the plurality of signals included in the three first control signals and the plurality of signals included in the second control signal to be same between timings of the transition.

A transmitter according to the disclosure includes: three first driver sections; three first pre-driver sections that are provided corresponding to the respective three first driver sections, and each drive corresponding one of the first driver sections on a basis of corresponding one of three first control signals that are different from one another and each including predetermined number of signals; a second pre-driver section that operates on a basis of a second control signal that includes predetermined number of signals; and a controller that controls transition of the predetermined number of signals included in the second control signal to allow number of signals to be subjected to the transition out of the plurality of signals included in the three first control signals and the plurality of signals included in the second control signal to be same between timings of the transition.