Imagers and associated devices and systems are disclosed herein. In one embodiment, an imager includes a pixel array and control circuitry operably coupled to the pixel array. The pixel array includes an imaging pixel configured to produce a reset signal and a non-imaging pixel configured to produce a nominal reset signal. The control circuitry is configured to produce an output signal based at least in part on one of (a) the nominal reset signal when distortion at the imaging pixel exceeds a threshold and (b) the reset signal when distortion does not exceed the threshold.

Photoelectric conversion device includes stacked first and second substrates. The first substrate includes pixel array, first joint portion arranged in the pixel array and connected to pixels in the pixel array, and power supply pad connected to the first joint portion. The second substrate includes readout circuit to read signal from the pixel array via signal line, and second joint portion jointed to the first joint portion. The readout circuit includes limiter circuit to limit amplitude of potential of the signal line. Power supply terminal of the limiter circuit is connected to the second joint portion, and power supply potential applied to the power supply pad is supplied to the pixels and supplied to the power supply terminal of the limiter circuit via the first and second joint portions.

An imaging apparatus includes: a light reception unit that receives a light emission signal from a transmission apparatus via a pixel; a detection unit that detects whether or not an output based on the light emission signal received by the light reception unit is a first threshold value or more; and a correction unit that corrects a luminance of the pixel when the output based on the light emission signal is the first threshold value or more based on a result detected by the detection unit.

A plurality of pixels PX include effective pixels and optical black pixels. Signal lines VL are provided corresponding to each column of the pixels PX and supplied with output signals of the pixels PX of the corresponding column. Clip transistors CL are provided corresponding to the respective signal lines VL and limit a potential of the corresponding vertical signal lines VL based on a gate potential. At least in a predetermined operating mode, a potential Vclip_dark is supplied to a gate of one of the clip transistors CL corresponding to at least one pixel column formed of the optical black pixels when reading a noise level from the pixels PX corresponding to the clip transistors CL and when reading a data level from the pixels PX corresponding to the clip transistors CL.

An image sensor includes a pixel array with active rows of pixel cells, a black level calibration row with black image data generation circuits coupled to generate black image data signals representative of an absence of the incident light, and a dummy row with black level clamping circuits coupled to receive a black sun reference voltage to clamp bitlines of the pixel array, and a black level calibration circuit coupled to receive the black sun reference voltage to generate a black sun calibration voltage. A black sun feedback circuit is coupled to generate the black sun reference voltage in response to the black sun calibration voltage and a black level sample reference, and a black level sampling circuit is coupled to the bitlines to sample the black image data signals to generate the black level sample reference received by the black sun feedback circuit.

A system and method is provided for performing high dynamic range digital double sampling. More particularly, a CMOS image sensor is provided that includes a pixel array with each pixel sampling both dark and bright values for digital double sampling. After the sampled signals are digitized, a mean dark value is determined and each dark value is further fed to a lookup table that generates an output value taking into account whether the pixel has been saturated. In over exposed conditions, the lookup table will generate a negative value output to eliminate image artifacts. All three values are fed to adder logic circuit that subtracts the mean dark value and the lookup table output from the bright value. This resulting output is fed to a video viewer.

An image capturing apparatus includes a plurality of pixels, a signal line connected to the plurality of pixels, and a limiter circuit configured to limit an amplitude of the signal at the signal line. A first pixel in the plurality of pixels sequentially outputs a noise signal, a focus detection signal, and an image capturing signal to the signal line. A second pixel in the plurality of pixels sequentially outputs a noise signal and an image capturing signal to the signal line, and wherein a potential of the signal at the signal line is set to a potential by the limiter circuit during a period after the second pixel outputs the noise signal and before the second pixel outputs the image capturing signal.

Imagers and associated devices and systems are disclosed herein. In one embodiment, an imager includes a pixel array and control circuitry operably coupled to the pixel array. The pixel array includes an imaging pixel configured to produce a reset signal and a non-imaging pixel configured to produce a nominal reset signal. The control circuity is configured to produce an output signal based at least in part on one of (a) the nominal reset signal when distortion at the imaging pixel exceeds a threshold and (b) the reset signal when distortion does not exceed the threshold.

An imaging device according to the present disclosure includes: an imaging unit; a connector; and a converter. The imaging unit includes a first signal line, a first pixel, a second signal line, and a second pixel. The first pixel is configured to output a first pixel voltage to the first signal line. The first pixel voltage corresponds to an amount of received light. The second pixel is configured to output a second pixel voltage to the second signal line. The second pixel voltage corresponds to the amount of received light. The connector includes a connection line, a first connection switch, a first control circuit, a second connection switch, and a second control circuit. The first connection switch is configured to couple the first signal line to the connection line by being turned on. The first control circuit is configured to control an operation of the first connection switch on the basis of a voltage in the first signal line. The second connection switch is configured to couple the second signal line to the connection line by being turned on. The second control circuit is configured to control an operation of the second connection switch on the basis of a voltage in the second signal line. The converter is coupled to the first signal line and the second signal line. The converter is configured to perform AD conversion on the basis of each of the first pixel voltage and the second pixel voltage.

Imagers and associated devices and systems are disclosed herein. In one embodiment, an imager includes a pixel array and control circuitry operably coupled to the pixel array. The pixel array includes an imaging pixel configured to produce a reset signal and a non-imaging pixel configured to produce a nominal reset signal. The control circuitry is configured to produce an output signal based at least in part on one of (a) the nominal reset signal when distortion at the imaging pixel exceeds a threshold and (b) the reset signal when distortion does not exceed the threshold.