A solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity are provided. The solid-state imaging device includes a semiconductor layer in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer, and a longitudinal transistor Tr1 in which a gate electrode is formed to be embedded in the semiconductor layer from a surface of the semiconductor layer. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion of the gate electrode of the longitudinal transistor Tr1 embedded in the semiconductor substrate and is connected to a channel formed by the longitudinal transistor Tr1.

A solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity are provided. The solid-state imaging device includes a semiconductor layer in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer, and a longitudinal transistor Tr1 in which a gate electrode is formed to be embedded in the semiconductor layer from a surface of the semiconductor layer. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion of the gate electrode of the longitudinal transistor Tr1 embedded in the semiconductor substrate and is connected to a channel formed by the longitudinal transistor Tr1.

A TDI scanner including a dynamically programmable focal plane array including a two-dimensional array of detectors arranged in a plurality of columns and a plurality of rows, the array being divided into a plurality of banks separated from one another by gap regions, each bank including a plurality of sub-banks, and each sub-bank including at least one row of detectors, a ROIC coupled to the focal plane array and configured to combine in a TDI process outputs from detectors in each column of detectors in each sub-bank, and a controller configured to program the focal plane array to selectively and dynamically set characteristics of the focal plane array, the characteristics including a size and a location within the two-dimensional array of each of the plurality of sub-banks and the gap regions, the size corresponding to a number of rows of detectors included in the respective sub-bank or gap region.

Systems and methods in accordance with embodiments of the invention implement TDI imaging techniques in conjunction with monolithic CCD image sensors having multiple distinct imaging regions, where TDI imaging techniques can be separately implemented with respect to each distinct imaging region. In many embodiments, the distinct imaging regions are defined by color filters or color filter patterns (e.g. a Bayer filter pattern); and data from the distinct imaging regions can be read out concurrently (or else sequentially and/or nearly concurrently). A camera system can include: a CCD image sensor including a plurality of pixels that define at least two distinct imaging regions, where pixels within each imaging region operate in unison to image a scene differently than at least one other distinct imaging region. In addition, the camera system is operable in a time-delay integration mode whereby time delay-integration imaging techniques are imposed with respect to each distinct imaging region.

A time delay integration image sensor may include a number of charge coupled devices (CCDs) that transfer charge in synchronization with the movement of an object being imaged. To increase the dynamic range of the image sensor, the image sensor may include circuitry configured to non-destructively sample the charge as it is transferred through the charge coupled devices. Floating gates may be included in the image sensor and may have a voltage that is proportional to the charge accumulated under the floating gates. Each floating gate may be coupled to a respective readout circuit in an additional substrate by a metal interconnect layer.

The present technique relates to a solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity. The solid-state imaging device includes a semiconductor layer in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer, and a longitudinal transistor Tr1 in which a gate electrode is formed to be embedded in the semiconductor layer from a surface of the semiconductor layer. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion of the gate electrode of the longitudinal transistor Tr1 embedded in the semiconductor substrate and is connected to a channel formed by the longitudinal transistor Tr1.

Provided are an X-ray inspection apparatus and an X-ray inspection method. The X-ray inspection apparatus includes: an X-ray source; a sample moving mechanism; the TDI sensor; and a TDI computing unit. The TDI computing unit includes a data transfer unit configured to transfer, to an outside, data of accumulated charges obtained by accumulating and transferring the charges, and has a function of setting in advance, as a determination region, a plurality of columns of line sensors with which the sample is detectable, and of detecting the sample in the determination region. The data transfer unit is configured to set, as detecting rows, rows of the pixels with which the sample has been detected in the determination region and rows around the rows, and transfer, to the outside, the data of accumulated charges only for pixels in the detecting rows.

An imaging sensor is disclosed, comprising: a set of at least two charge-coupled device, CCD, sub-arrays, wherein each sub-array comprises pixels arranged in columns and rows, and each pixel being arranged to accumulate an electric charge proportional to an intensity of light incident on the pixel; a time delay and integration, TDI, clocking circuitry for controlling and timing transfer of accumulated electric charges between rows of pixels in a column direction in order to integrate the accumulated electric charges in each column of pixels; wherein each CCD sub-array further comprises a readout row for converting the integrated electric charge of each column of pixels into voltage or current, wherein the readout row comprises transistors enabling readout of the signal by the readout block; and a readout block which is arranged to receive input from selected readout rows and convert the input into digital domain or convert the input to a combined representation of pixel values based on the set of CCD sub-arrays.

A solid-state imaging device in an embodiment is a solid-state imaging device including an output circuit configured to amplify signals read out from a plurality of pixels. The solid-state imaging device includes a logic circuit configured to generate operation timing of the output circuit and a delay generation circuit configured to control a delay amount for adjusting a pulse generated by the logic circuit to optimum timing. The delay generation circuit is configured of a first variable delay circuit configured to generate a delay pulse, a reference clock of which is delayed by a reference delay amount, a control circuit configured to control the first variable delay circuit and calculate, as a digital signal, a delay code corresponding to the reference delay amount, and a second variable delay circuit configured to adjust the timing of the pulse using the delay code.

The present technique relates to a solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity. The solid-state imaging device includes a semiconductor layer in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer, and a longitudinal transistor Tr1 in which a gate electrode is formed to be embedded in the semiconductor layer from a surface of the semiconductor layer. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion of the gate electrode of the longitudinal transistor Tr1 embedded in the semiconductor substrate and is connected to a channel formed by the longitudinal transistor Tr1.