Patent classifications
H04N25/745
AD conversion circuit, photoelectric conversion apparatus, photoelectric conversion system, and moving body
An AD conversion circuit includes a comparator configured to compare an analog signal with a ramp signal and output a comparison result signal indicating a result of the comparison, and performs an AD conversion using the comparison result signal. In the comparison, a potential of the ramp signal changes with a lapse of time from a first potential to a second potential. Before the comparison, the potential of the ramp signal changes at a first change rate and then changes at a second change rate smaller than the first change rate, the potential of the ramp signal changes from the first potential to a third potential between the first potential and the second potential, and the comparator is reset in a state where the third potential is input to the comparator.
Image sensor
An image sensor includes: first lines transferring a first clock having the same phase as that of modulated light in a first phase and a third clock having a phase difference of a ½ cycle from the phase of the modulated light in a second phase; second lines transferring the third clock in the first phase and the first clock in the second phase; third lines transferring a second clock having a phase difference of a ¼ cycle from the phase of the modulated light in the first phase and a fourth clock having a phase difference of a ¾ cycle from the phase of the modulated light in the second phase; fourth lines transferring the fourth clock in the first phase and the second clock in the second phase; and a pixel array including first pixels and second pixels that are alternately arranged in row and column directions.
Imaging device with reduced delay in display
An imaging device including an image sensor; an image data generation portion that generates image data on the basis of output data from the image sensor; a display portion that displays the image data within a display scanning period in a display cycle that is N times the sensor cycle (N>=2); and a display control portion that, when a partial image constituting the image and corresponding to a predetermined one of the lines forming the image has become ready for display on the basis of partial image data constituting the image data and representing the partial image, performs control of causing the display portion to start display of partial images constituting the image and corresponding to one frame, at a rate of once every N iterations of the imaging operation by the image sensor.
Photoelectric conversion device, electronic equipment, and substrate with multiple delta-sigma A/D converters
A photoelectric conversion device comprising a pixel unit in which a plurality of pixels each comprising a photoelectric conversion element are arranged in a matrix, and a plurality of delta-sigma AD converters each configured to convert a signal output from the pixel unit into a digital signal, is provided. The plurality of delta-sigma AD converters are divided into at least two groups having different timings of starting AD conversion from each other when converting, into digital signals, signals output from the pixels selected out of the plurality of pixels via a common pixel control line.
Image sensing device and imaging device including the same
An image sensing device includes a first test block, a second test block, and a readout block. The first test block includes a plurality of first image sensing pixels structured to convert incident light carrying an image into a first pixel signal indicative of the image, and a first heating element structured to transmit heat to the first image sensing pixels. The second test block includes a plurality of second image sensing pixels that each include a light blocking structure to be shielded from receiving incident light to generate a second pixel signal without being directly exposed to the incident light, and a second heating element structured to transmit heat to the second image sensing pixels. The readout block processes the first pixel signal output from the first test block and the second pixel signal output from the second test block.
HORIZONTAL BANDING REDUCTION WITH RAMP GENERATOR ISOLATION IN AN IMAGE SENSOR
A readout circuit for use in an image sensor includes a system ramp generator coupled to generate a system ramp signal. A plurality of analog-to-digital converters is coupled to a plurality of column bitlines from a pixel array to receive corresponding analog column image signals. An isolation ramp buffer is coupled between the system ramp generator and the analog-to-digital converters. The isolation ramp buffer includes a single input to receive the system ramp signal, and a plurality of isolated outputs. Each of the isolated outputs is coupled to provide an isolated column ramp signal to a corresponding analog-to-digital converter. Each of the of analog-to-digital converters is coupled to generate a corresponding digital column image signal in response to the corresponding analog column image signal and corresponding isolated column ramp signal.
SOLID-STATE IMAGE PICKUP APPARATUS AND IMAGE PICKUP SYSTEM
Provided is a solid-state image pickup apparatus which includes a plurality of groups, each including an output line to which the pixel signals are output from pixels in a corresponding column and an AD conversion unit configured to perform AD conversion on the pixel signals output to the output line for some of the plurality of rows to generate a digital signal. An adjustment period for ensuring a difference in length between a first horizontal period and a second horizontal period and executing an operation of the AD conversion unit is set in a period excluding a period from first timing at which the output of the pixel signals to the output line starts, to second timing at which the AD conversion unit starts the AD conversion.
IMAGING APPARATUS
An imaging apparatus includes a rolling shutter type first image sensor and second image sensor, a timing generator that controls operation timings of these two image sensors, and a controller that subjects generated image data to image processing and controls the timing generator. The first image sensor captures an image of a subject to generate first image data, and the second image sensor captures an image of the subject to generate second image data. Each of the first image data and the second image data has a duplicate region in which the subject is partly duplicated. The controller controls the timing generator in such a way that a period over which the first image sensor exposes lines within the duplicate region in the first image data coincides with a period over which the second image sensor exposes lines within the duplicate region in the second image data.
Image device for synchronizing timing of imaging by first and second image sensors, and endoscopic device
An imaging device includes: first and second image sensors; a first communication controller configured to be connected to the first image sensor; a first clock generator that generates a first clock signal that is a reference for operation of the first communication controller; a second communication controller configured to be connected to the second image sensor; a second clock generator that generates a second clock signal that is a reference for operation of the second communication controller; a reference synchronization signal generator that generates a reference synchronization signal; and an imaging synchronization signal generator that generates an imaging synchronization signal which is a trigger for determining timings of imaging by the first and second image sensors, and outputs the imaging synchronization signal to the first and second communication controllers at a timing when a predetermined period of time has elapsed from a reference timing based on the reference synchronization signal.
Image sensor and image processing system including the same
An image sensor which operates in a global shutter mode is provided. The image sensor includes a pixel array comprising a plurality of pixels arranged in a plurality of rows and columns, a timing generator configured to generate row driver control signals which controls an integration period of a pixel of the plurality of pixels to include at least two sub integration periods, and a row driver configured to generate a plurality of row control signals which controls each of the rows in the pixel array based on the row driver control signals, wherein the timing generator is further configured to control a single image frame to include the integration period and a readout period of the pixel, based on the row driver control signals.