An image sensing device includes an image sensor suitable for correcting depth information based on a control signal, and for generating image data according to the depth information, and a controller suitable for analyzing an error of the depth information, and for generating the control signal, based on first and second cycle signals provided from the image sensor.

An image sensor includes a pixel array; a logic circuit configured to convert an image signal generated from the pixel array during a first period into image data; and a memory. The image data may be written in the memory during a second period, of which at least a portion overlaps the first period. The logic circuit may write dummy data in the memory during a third period overlapping the first period and not overlapping the second period.

An A/D converter and an image sensor are disclosed. The image sensor includes: a pixel array including a plurality of pixels; a ramp signal generator configured to generate a ramp signal; and a comparison circuit configured to output a comparison result signal by comparing a pixel signal output by the pixel array with the ramp signal. The comparison circuit includes: a first comparator stage configured to output a first stage output signal according to a result of comparing the pixel signal with the ramp signal, to a first circuit node; a limiter including an n-type transistor having one end connected to the first circuit node and an opposite end to which power supply voltage is applied; and a second comparator stage configured to generate the comparison result signal by shaping the first stage output signal.

An analog-to-digital conversion circuit includes a comparator circuit configured to perform processing of comparison between an analog signal and a ramp signal, and a counter configured to perform count processing in parallel with the comparison processing by the comparator circuit. The analog-to-digital conversion circuit acquires digital data, which is a count value corresponding to the comparison processing, and subjects the analog signal to analog-to-digital conversion. A period from the start to the end of the analog-to-digital conversion of the one analog signal includes a first period and a second period following the first period. The first and the second periods are switched based on an output of the counter. The count processing is performed at a high speed during the first period and performed at a low speed during the second period.

There is provided a pixel circuit including a first circuit and a second circuit. The first circuit is used to output a first voltage associated with exposure intensity. The second circuit is used to output a second voltage associated with exposure time interval. The processor multiples the first voltage to a ratio between a reference voltage and the second voltage to obtain an actual light intensity, wherein the reference voltage is a voltage value outputted by the second circuit of a dummy pixel.

A sensor system includes a sensor array configured to include a first sensor and a second sensor, the first sensor detecting with a first sensitivity a variation in a quantity of light at a first pixel address, the second sensor detecting with a second sensitivity a variation in a quantity of light at a second pixel address, the second pixel address being adjacent to or coinciding with the first pixel address, the second sensitivity being lower than the first sensitivity, and an event signal processing section configured to output information indicative of a difference between times at which the first sensor and the second sensor each have generated an event signal in response to a luminance variation event.

A solid-state imaging device includes: a pixel unit that outputs a pixel signal corresponding to an amount of incident light; an A/D converter that performs A/D conversion on the pixel signal; and a D/A conversion circuit that generates a reference signal to be used by the A/D converter. The D/A conversion circuit includes a first buffer circuit that outputs a base voltage VTOP for generating the reference signal, and the first buffer circuit includes a differential pair circuit including a first transistor and a second transistor, and a suppression circuit that suppresses a variation in the base voltage by canceling out a characteristic difference between the first transistor and the second transistor.

An imaging apparatus includes: an imaging element including a pixel array, a drive circuit of the pixel array, and a signal processing circuit as defined herein; a power supply; a power supply control circuit that controls electric power supplied to the imaging element from the power supply; and a processor, and the processor is configured to control the power supply control circuit to stop the supply of electric power to a part of circuits of the imaging element from the power supply at a first timing after completion of the readout of the signal, to resume the supply of electric power to the part of the circuits at a third timing before a second timing that is a start timing of the readout of the signal from the pixel array performed after the first timing, and to variably control an interval between the second timing and the third timing.

A device uses gated retro-reflectors to transmit uplink data in a visible light communication (VLC) system. The gated retro-reflector includes a retro-reflector and a gating shutter between the retro-reflector and a VLC light source. A light sensor receives VLC data at regular intervals in which a light pulse received during one of the intervals represents a first downloaded symbol and absence of a light pulse during another one of the intervals represents a second downloaded symbol. A controller controls the gating shutter to send uplink data from the device responsive to each received VLC light pulse. The controller opens the gating shutter during the reception of a VLC light pulse to upload a first uploaded symbol and closes the gating shutter during the reception of a VLC light pulse to upload a second uploaded symbol.

There is provided a solid-state image sensor including a pixel circuit including a plurality of pixels and imaging a subject, a peripheral circuit provided in a vicinity of the pixel circuit and performing operation in regard to imaging, and a connection element electrically connecting, in initialization of the pixels, elements in the pixels to which a predetermined voltage is applied for initializing the pixels to the peripheral circuit with the predetermined voltage.