The dynamic range of a solid-state imaging element including a comparator is expanded.

The solid-state imaging element includes a pixel circuit and a comparison transistor. In the solid-state imaging element, the pixel circuit generates a pixel signal and outputs the pixel signal to a vertical signal line. Further, the comparison transistor has a source connected to a constant current source configured to supply a constant current to the vertical signal line. The comparison transistor has a gate to which a predetermined reference signal is input. Further, the comparison transistor has a drain from which a comparison result between the pixel signal and the reference signal is output.

Embodiments of pixel circuit, image sensor, image pickup device and methods for using the same are provided. In an example, the pixel circuit comprises a source module configured to output non-simultaneously a reference signal indicative of a reset level and an electrical signal indicative of incident light, a sampling module comprising a first sampling unit, a second sampling unit and a sampling switch, a first switch module configured to be electrically coupled between the source module and the sampling module, and a second switch module configured to be electrically coupled between the sampling module and a bus.

Technologies are described herein that are configured to generate a corrected image by addressing photo response nonuniformity (PRNU) in a camera having a global shutter. A calibration procedure is described, where correction factors for each pixel in an image sensor are computed and subsequently employed to generate improved images.

A correlated double sampling (CDS) circuit, an operating method thereof, and an image sensor including the CDS circuit are disclosed. The CDS circuit includes a first comparator configured to operate based on a first bias current, and compare, with a ramp signal, a pixel voltage that is output from a pixel, during a first period and a fourth period during which the pixel operates in a low conversion gain (LCG) mode, a second comparator configured to operate based on a second bias current, and compare, with the ramp signal, the pixel voltage output from the pixel, during a second period and a third period during which the pixel operates in a high conversion gain (HCG) mode, the second period being after the first period, the third period being after the second period, and the fourth period being after the third period.

A solid-state imaging device includes a photoelectric conversion unit, a light shielding unit and a transfer transistor. The photoelectric conversion unit generates charges by photoelectrically converting light. The light shielding unit is formed by engraving a semiconductor substrate on which the photoelectric conversion unit is formed, so as to surround an outer periphery of the photoelectric conversion unit. The transfer transistor transfers charges generated in the photoelectric conversion unit. During a charge accumulation period in which charges are accumulated in the photoelectric conversion unit, a potential that repels the charges is supplied to the light shielding unit and a gate electrode of the transfer transistor. During a charge transfer period in which charges are transferred from the photoelectric conversion unit, a potential that repels the charges is supplied to the light shielding unit and a potential that attracts the charges is supplied to the gate electrode of the transfer transistor.

The present invention relates to an imaging apparatus for realizing real time image display and the like while controlling the processing performance of an external circuit and the size of the circuit when outputting a large amount of data from an image sensor at a high speed, and is provided with (a) an image sensor including, a plurality of light receiving units disposed in rows and columns, an A/D conversion unit, a compression unit for compressing outputs from the A/D conversion unit row by row, and (b) a first data processing unit for thinning compressed data row by row, a first data decompression unit that decompresses outputs of the first data processing unit; and a first image processing unit which carries out a predetermined processing on outputs of the first data decompression unit.

Provided are a solid-state imaging device capable of improving image quality of a captured image even if the pixel size is increased, and an electronic device equipped with the solid-state imaging device. A solid-state imaging device is provided that includes: at least two column areas that perform Analog To Digital (AD) conversion of a pixel signal generated by a pixel; a plurality of vertical signal lines that transfers the pixel signal to the column areas; and a free area in which the plurality of vertical signal lines is not wired, in which two of the vertical signal lines facing each other sandwiching the free area are arranged, and lengths of the two vertical signal lines are substantially equal to each other.

Provided are a solid-state imaging device capable of improving image quality of a captured image even if the pixel size is increased, and an electronic device equipped with the solid-state imaging device. A solid-state imaging device is provided that includes: at least two column areas that perform Analog To Digital (AD) conversion of a pixel signal generated by a pixel; a plurality of vertical signal lines that transfers the pixel signal to the column areas; and a free area in which the plurality of vertical signal lines is not wired, in which two of the vertical signal lines facing each other sandwiching the free area are arranged, and lengths of the two vertical signal lines are substantially equal to each other.

A time-of-flight (ToF) image sensor system includes a pixel array, where each pixel of the pixel array is configured to receive a reflected modulated light signal and to demodulate the reflected modulated light signal to generate an electrical signal; a plurality of analog-to-digital converters (ADCs), where each ADC is coupled to at least one assigned pixel of the pixel array and is configured to convert a corresponding electrical signal generated by the at least one assigned pixel into an actual pixel value; and a binning circuit coupled to the plurality of ADCs and configured to generate at least one interpolated pixel, where the binning circuit is configured to generate each of the at least one interpolated pixel based on actual pixel values corresponding to a different pair of adjacent pixels of the pixel array, each of the at least one interpolated pixel having a virtual pixel value.

An imager device includes a pixel sensor configured to receive and convert incident radiation into a pixel signal and a readout circuit configured to receive the pixel signal from the pixel sensor, generate a received signal strength indicator (RSSI) value based on the pixel signal, and generate a digital signal based on the RSSI value and the pixel signal.