H04N25/779

Reference clock complementary metal-oxide semiconductor (CMOS) input buffer with self-calibration and improved electrostatic discharge (ESP) performance

Reference clock CMOS input buffer with self-calibration and improved ESD performance. In one embodiment, a reference clock input buffer of an image sensor includes a Schmitt trigger configured to generate a clock signal having a falling edge and a rising edge. The falling edge and the rising edge are separated by a hysteresis voltage. The Schmitt trigger includes a plurality of output switches and a plurality of voltage control switches that are individually coupled to individual output switches [M2-i] of the plurality of output switches. Voltage of the falling edge signal or the rising edge signal of the Schmitt trigger is adjustable by selectively switching at least one voltage control switch of the plurality of voltage control switches.

SOLID-STATE IMAGING DEVICE AND SOLID-STATE IMAGING SYSTEM

Effective pixels and a failure detection pixel are connected to a control signal line for controlling an operation of the pixels and to an output signal line for outputting a result of failure detection in the pixels. Among the effective pixels, the effective pixels in a same row are connected in common to a same control signal line, and the effective pixels in a same column are connected in common to a same output signal line. The failure detection pixel is connected in common to at least one of the control signal line or the output signal line and configured to detect a failure in any of the effective pixels connected to the at least one of the control signal line or the output signal line.

SOLID-STATE IMAGING DEVICE AND SOLID-STATE IMAGING SYSTEM

Effective pixels and a failure detection pixel are connected to a control signal line for controlling an operation of the pixels and to an output signal line for outputting a result of failure detection in the pixels. Among the effective pixels, the effective pixels in a same row are connected in common to a same control signal line, and the effective pixels in a same column are connected in common to a same output signal line. The failure detection pixel is connected in common to at least one of the control signal line or the output signal line and configured to detect a failure in any of the effective pixels connected to the at least one of the control signal line or the output signal line.

PHOTOELECTRIC CONVERSION DEVICE HAVING EXPANDED DYNAMIC RANGE AND TRANSFER ELECTRODES
20230387173 · 2023-11-30 ·

A photoelectric conversion device includes first and second photoelectric conversion circuits, a floating diffusion portion, first and second transfer electrodes, and a first control electrode. The second photoelectric conversion circuit has sensitivity lower than that of the first photoelectric conversion circuit. Charges generated in the first photoelectric conversion circuit and the second photoelectric conversion circuit are transferred to the floating diffusion portion. The first transfer electrode is configured to transfer charges from the first photoelectric conversion circuit to the floating diffusion portion. The second transfer electrode is configured to transfer charges from the second photoelectric conversion circuit to the floating diffusion portion. The first control electrode is configured to control a potential between the first photoelectric conversion circuit and the second photoelectric conversion circuit so that charges are movable between the first photoelectric conversion circuit and the second photoelectric conversion circuit.

APPARATUS, AND METHOD
20230388680 · 2023-11-30 ·

An apparatus includes a readout line, and a plurality of pixel cells each including a conversion unit, an output unit configured to output a signal corresponding to a charge generated by the conversion unit, and a selection switch provided on a pathway between the output unit and the readout line. The apparatus includes a first switch provided on a pathway between the readout line and a first potential line, a second switch provided on a pathway between the pixel cell and the readout line, and a control unit configured to bring the second switch into an off state during a first period during which the first switch is in an on state.

METHODS AND APPARATUS FOR AN IMAGE SENSOR

Various embodiments of the present technology provide a method and apparatus for an image sensor. In various embodiments, the apparatus provides a driver circuit connected to a plurality of electrically distinct pixel groups to provide the pixel groups with a control signal. A delay measurement circuit is connected to the driver circuit and at least one of the pixel groups to measure a time delay of the control signal. A row control circuit is connected to the delay measurement circuit to receive the measured time delay and, in turn, deliver, via the driver circuit, the control signal to all pixel groups in a single row substantially simultaneously.

METHODS AND APPARATUS FOR AN IMAGE SENSOR

Various embodiments of the present technology provide a method and apparatus for an image sensor. In various embodiments, the apparatus provides a driver circuit connected to a plurality of electrically distinct pixel groups to provide the pixel groups with a control signal. A delay measurement circuit is connected to the driver circuit and at least one of the pixel groups to measure a time delay of the control signal. A row control circuit is connected to the delay measurement circuit to receive the measured time delay and, in turn, deliver, via the driver circuit, the control signal to all pixel groups in a single row substantially simultaneously.

Methods and apparatus for an image sensor

Various embodiments of the present technology provide a method and apparatus for an image sensor. In various embodiments, the apparatus provides a driver circuit connected to a plurality of electrically distinct pixel groups to provide the pixel groups with a control signal. A delay measurement circuit is connected to the driver circuit and at least one of the pixel groups to measure a time delay of the control signal. A row control circuit is connected to the delay measurement circuit to receive the measured time delay and, in turn, deliver, via the driver circuit, the control signal to all pixel groups in a single row substantially simultaneously.

SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS
20240007768 · 2024-01-04 ·

There are provided a solid-state imaging device and an electronic apparatus that can enhance the conversion efficiency to a degree similar to that of a non-sharing pixel and can maintain the optical symmetry also in a case where sharing between pixels is performed. The solid-state imaging device includes a plurality of pixels arranged in a matrix, and each of the plurality of pixels includes: a photoelectric conversion unit configured to photoelectrically convert incident light; a floating diffusion portion in which signal charge generated by the photoelectric conversion unit is stored; an amplification transistor configured to amplify a potential corresponding to an amount the signal charge stored in the floating diffusion portion, and output a pixel signal corresponding to the amplified potential; and a conversion-efficiency adjustment transistor configured to adjust a conversion efficiency of the signal charge stored in the floating diffusion portion. At least a part of the plurality of pixels forms sharing pixels, and a transistor other than the amplification transistor and the conversion-efficiency adjustment transistor is shared by a plurality of pixels forming the sharing pixels.

SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS
20240007768 · 2024-01-04 ·

There are provided a solid-state imaging device and an electronic apparatus that can enhance the conversion efficiency to a degree similar to that of a non-sharing pixel and can maintain the optical symmetry also in a case where sharing between pixels is performed. The solid-state imaging device includes a plurality of pixels arranged in a matrix, and each of the plurality of pixels includes: a photoelectric conversion unit configured to photoelectrically convert incident light; a floating diffusion portion in which signal charge generated by the photoelectric conversion unit is stored; an amplification transistor configured to amplify a potential corresponding to an amount the signal charge stored in the floating diffusion portion, and output a pixel signal corresponding to the amplified potential; and a conversion-efficiency adjustment transistor configured to adjust a conversion efficiency of the signal charge stored in the floating diffusion portion. At least a part of the plurality of pixels forms sharing pixels, and a transistor other than the amplification transistor and the conversion-efficiency adjustment transistor is shared by a plurality of pixels forming the sharing pixels.