An image sensor and an image sensing method are provided. A readout circuit outputs a first digital sensing signal according to a floating diffusion node voltage of a first pixel circuit reset after a reset stage and a floating diffusion node voltage of a second pixel circuit reset after the reset stage during a reset signal readout period. The readout circuit outputs a second digital sensing signal according to a sensing result of the first pixel circuit and the floating diffusion node voltage of the second pixel circuit reset after the same reset stage during a sensing signal readout period. The image processing circuit judges whether a digital number of at least one of the first digital sensing signal and the second digital sensing signal is abnormal to decide to keep an original digital number, directly set a pixel value, or reset the second digital sensing signal.

An image sensor and an operating method thereof are provided. The image sensor includes a first pixel circuit, a first column readout circuit, and a second column readout circuit. The first pixel circuit includes a first pixel unit, a first transfer transistor, a first reset transistor, a first readout transistor, and a first capacitor. The first column readout circuit includes a first circuit node. The second column readout circuit includes a bias transistor. A first terminal of the first reset transistor and a first terminal of the first readout transistor are coupled to the first circuit node, and a second terminal of the first readout transistor is coupled to the bias transistor.

An image sensor and an operation method thereof are provided. The image sensor includes a pixel circuit and a column readout circuit. The pixel circuit includes a pixel unit, a transfer transistor, a reset transistor, a readout transistor and a selection transistor. The column readout circuit includes a first circuit node and a second circuit node. A first terminal of the first reset transistor and a first terminal of the first readout transistor are coupled to a first circuit node, and a second terminal of the first select transistor is coupled to a second circuit node.

A universal Read-Out Integrated Circuit (ROIC) interface apparatus configurable to control each of a plurality of different types of ROICs, each type of ROIC being configured to operate as an optical frontend to a respective optical detector array, the universal ROIC interface comprising a Pulse Capture Electronics (PCE) system or sub-system including a power subsystem, a ROIC data receive interface, a clock management system, and a signal processor integrated together, such as on a common printed circuit board (PCB).

An image sensor is provided. The image sensor comprises a photodiode, a transmission transistor having a first end connected to the photodiode and a second end connected to a first node, a first switching transistor having a first end connected to the first node, a first capacitor having a first electrode connected to a second end of the first switching transistor, a second capacitor having a first electrode connected to the first node. A second electrode of the first capacitor is configured to receive a power voltage, and a second electrode of the second capacitor is configured to receive a boosting signal.

A degree of freedom in design is improved in a solid-state imaging element in which a logic gate is provided in a comparator. A comparison circuit compares an input potential which has been input with a predetermined reference potential and outputs any one of a pair of output potentials as a comparison result. A level shift circuit outputs any one of a pair of shift potentials having a larger potential difference than the pair of output potentials as an output signal on the basis of the comparison result. The logic gate determines whether or not the output signal is higher than a predetermined threshold between the pair of shift potentials and outputs a determination result. A counter counts a count value over a period until the determination result is inverted.

A voltage drop of a floating diffusion capacitor is suppressed.

A solid-state imaging device includes a floating diffusion that accumulates charge generated by photoelectric conversion according to an amount of received light of a pixel, a comparison circuit that compares a voltage corresponding to accumulated charge of the floating diffusion with a reference voltage, and a boosting unit that raises a potential on one end side of the floating diffusion during photoelectric conversion.

A photoelectric conversion device includes a pixel including a photoelectric conversion unit configured to output a pulse in response to incidence of a photon, a counting unit including a plurality of counters each configured to count pulses output from the photoelectric conversion unit, and a calculation unit configured to perform calculation processing on a plurality of count values held by the plurality of counters, and an output line connected to the pixel. The calculation unit outputs a determination value indicating a relationship between the plurality of count values. The pixel outputs a pixel signal including a determination value to the output line.

An apparatus includes a readout line, and a plurality of pixel cells each including a conversion unit, an output unit configured to output a signal corresponding to a charge generated by the conversion unit, and a selection switch provided on a pathway between the output unit and the readout line. The apparatus includes a first switch provided on a pathway between the readout line and a first potential line, a second switch provided on a pathway between the pixel cell and the readout line, and a control unit configured to bring the second switch into an off state during a first period during which the first switch is in an on state.

Various embodiments of the present technology provide a method and apparatus for an image sensor. In various embodiments, the apparatus provides a driver circuit connected to a plurality of electrically distinct pixel groups to provide the pixel groups with a control signal. A delay measurement circuit is connected to the driver circuit and at least one of the pixel groups to measure a time delay of the control signal. A row control circuit is connected to the delay measurement circuit to receive the measured time delay and, in turn, deliver, via the driver circuit, the control signal to all pixel groups in a single row substantially simultaneously.