A control device including a solder joint life predictor includes: a temperature sensor that measures temperature of a solder joint on an electronic circuit board that drives a heater and a motor; a storage that stores a reference acceleration factor that is an acceleration factor based on a test condition of a thermal shock test and a reference condition in an environment in which the electrical appliance is used; a calculator that calculates an actual acceleration factor from a temperature variation range and a maximum reached temperature of the solder joint during one cycle from start to end of driving of the heater or the motor; and a determiner that predicts the life of the solder joint by comparing the integrated value of the acceleration factor ratios with a threshold.

Provided are a connector structure, and a skew calculation method and device. Specifically, the connector structure includes: a first Printed Circuit Board (PCB) (12), which includes a first board (122) and a second board (124), and is connected to a testing device; and a second PCB (14), which includes a third board (142) and a fourth board (144), and is connected to the testing device. The first board (122) is connected to the third board (142) through a connector (16).

A functional electronics unit for a high current component which is provided for electrical and mechanical connection to a circuit board or to another mechanical carrier substrate for a circuit grouping or circuit, with conductor tracks, conductive surface elements and/or other conductive regions and contacts, the functional electronics unit having electronic components which are designed to measure properties of the electric current flowing through the component or of an electric voltage applied to the component or to perform another electronic functionality, is characterized in that the functional electronics unit is retained on the high current component or on a common carrier. More particularly, the functional electronics unit can be integrated into the high current components and/or can be pushed onto the high current component in a modular fashion or can be fixed on the high current component.

It is an object of the present invention to provide a printed circuit board capable of accurately detecting disconnections of circuit patterns with an automatic circuit pattern inspecting device even when positions of mounting lands are slightly deviated from normal positions due to manufacturing errors.

For solving this object, the printed circuit board of the present invention is provided with a first mounting land 4a and a second mounting land 4b, and a first circuit pattern 6a and a second circuit pattern 6b on a surface thereof, wherein a first electric checker land 10a and a second checker land 10b which are electrically connected with the first mounting land 4a and the second mounting land 4b are provided on a surface of a wiring board 2.

Electrical or electronic control device has an electrical or electronic assembly, which includes a printed circuit board composed of an electrically insulating carrier material, electrically conductive conductor tracks formed on the printed circuit board, and electrical or electronic modules connected to the printed circuit board and via the conductor tracks. A coating is applied at least in sections to the electrical or electronic assembly. The coating includes at least the following layers: a first electrical conductor layer, a second electrical conductor layer, a dielectric layer arranged between the first conductor layer and the second conductor layer, an insulator layer applied to the second conductor layer in such a way that the second conductor layer is arranged between the dielectric layer and the insulator layer. An evaluation unit is connected to the conductor layers and detects a change in capacitance of the coating.

The present disclosure describes printed circuit board performance evaluation techniques. In some cases, a printed circuit board performance evaluation process may include determining a first set of electrical properties associated with an interface between components of a printed circuit board, where the interface is disposed on an internal or external layer of the printed circuit board. After selective application of a sheet of dielectric material to a portion of a transmission line in the interface, a second set of electrical properties associated with the interface may be determined. The first set of electrical properties may be compared to the second set of electrical properties to evaluate printed circuit board performance. In other cases, the interface may include a trace inductor, and electrical properties of the interface before and after application of a ferrous material may be compared to evaluate printed circuit board performance.

A display panel includes pixels and a driver IC pad area; a driver IC on the driver IC pad area of the display panel; first input pads and first output pads that overlap the driver IC pad area; a flexible printed circuit adjacent to the driver IC pad area on the display panel; first output test pads that overlap the flexible printed circuit, and are respectively extended to the first output pads; and first input extending wires that overlap the flexible printed circuit, are respectively extended to the first input pads, and are between the first output test pads.

The present disclosure provides a substrate motherboard including: a first substrate base, a first conductive pattern layer, at least one first insulating layer and a second conductive pattern layer which are sequentially arranged. The first conductive pattern layer includes a plurality of signal lines in the active region. The second conductive pattern layer includes a plurality of connection terminals in the active region, and the plurality of connection terminals are electrically coupled to corresponding signal lines in the plurality of signal lines. The substrate motherboard further includes a plurality of leading-out wires and a plurality of detection terminals in the non-active region, first ends of the plurality of leading-out wires are electrically coupled to corresponding connection terminals and extending to the non-active region to be electrically coupled to corresponding detection terminals through second ends thereof.

A reference via in a set of plated vias on a printed circuit board is located. A reference lead is applied to the reference via. A test via in the set of plated vias is located. A test lead is applied to the test via. An electrical conductance between the reference via and the test via is measured. A property of a core layer of the printed circuit board is identified based on the electrical conductance.

Examples may include techniques for use of a latch to secure a device inserted in a host computing system. The latch including a housing having holes or ports and an active contacts pad to receive external communication or control links routed through the holes or ports and to further route the communication or control links to circuitry at the device. The latch also including a securing pin attached to a lever to secure the device to the host computing system when the lever is engaged.