The present application discloses a method for locating an open circuit failure point of a test structure, which includes the following steps: step 1: providing a sample formed with a test structure, a first metal layer pattern and a second metal layer pattern of the test structure forming a series resistor structure through each via; step 2: performing a first active voltage contrast test to the sample to show an open circuit point and making a first scratch mark at an adjacent position of the open circuit point; step 3: forming a coating mark at the first scratch mark on the sample; step 4: performing a second active voltage contrast test to the sample to show the open circuit point and locating a relative position of the open circuit point by using a position of the coating mark as a reference position.

A drive circuit carrier and a display device. The drive circuit carrier includes a flexible substrate; and first test leads and second test leads, alternately staggered on a first surface of the flexible substrate in sequence. A first end of each first test lead is flush with a first edge of the first surface, and a second end of each second test lead is away from the first edge relative to the first end.

A display device includes: a first circuit board, wherein a first end of the first circuit board is attached to the panel pad area; and a second circuit board attached to a second end of the first circuit board, wherein the panel pad area includes a plurality of panel signal wirings, the second circuit board includes a plurality of circuit signal wirings, the first circuit board includes a first wiring layer including a plurality of first lead wirings coupled to the plurality of panel signal wirings, an insulating layer on the first wiring layer, and a second wiring layer on the insulating layer and electrically connected to the first wiring layer through the via hole, the plurality of first lead wirings includes a first sub-lead wiring, a second sub-lead wiring, and a first dummy lead wiring between the first sub-lead wiring and the second sub-lead wiring.

A flexible circuit board includes a flexible substrate, a chip and a patterned circuit layer. A surface of the flexible substrate is separated into a working area and a nonworking area according to a cutting line. The chip is disposed on the working area. The patterned circuit layer is disposed on the surface and includes signal transmission wires and bypass wires, the bypass wires are not electrically connected to the chip. Each of the bypass wires includes a bypass transmission portion located on the working area and an anti-peeling portion located on the nonworking area. A blank area exists between the anti-peeling area and the bypass transmission portion, and the cutting line passes through the blank area. A distance between 100 um and 400 um exists from the anti-peeling portion to the cutting line.

A display apparatus includes a printed circuit board including first to fourth output pad regions and a flexible circuit board having a first end connected to a display panel and a second end connected to the printed circuit board. The first output pad region includes a 1.sup.st-1.sup.st output pad group and a 1.sup.st-2.sup.nd output pad group, the second output pad region includes a 2.sup.nd-1.sup.st output pad group and a 2.sup.nd-2.sup.nd output pad group, the fourth output pad region includes a 4.sup.th- 1.sup.st output pad group and a 4.sup.th-2.sup.nd output pad group, and the printed circuit board includes a first input terminal electrically connected to the 1.sup.st-1.sup.st output pad group, a second input terminal electrically connected to the 2.sup.nd-2.sup.nd output pad group, a third input terminal electrically connected to the first input terminal, and a fourth input terminal electrically connected to the 4.sup.th-2.sup.nd output pad group.

The present invention relates to a method for manufacturing an electronic or electrical system, the method comprising the layer-free production of at least one physical structure (101, 102) which is designed to guide electromagnetic waves, using at least one additively operating apparatus, wherein the layer-free production of the spatial, layer-free structure comprises the simultaneous or sequential application and/or removal of one or more materials in the spatial arrangement, as a result of which the electronic or electrical system is partially or completely formed. The invention further relates to a system which is manufactured in accordance with the method.

A suspension board with circuit including a first mounting region for mounting a slider and a second mounting region for mounting a piezoelectric element. The wiring circuit board includes a metal support layer, a base insulating layer, and a conductive layer. The conductive layer includes a first wiring pattern, a second wiring pattern, and a shield wiring pattern. The first wiring pattern includes a read wiring. The second wiring pattern includes a power supply wiring disposed at spaced intervals to the read wiring. The shield wiring pattern includes a shield wiring disposed between the read wiring and the power supply wiring.

A reference via in a set of plated vias on a printed circuit board is located. A reference lead is applied to the reference via. A test via in the set of plated vias is located. A test lead is applied to the test via. An electrical conductance between the reference via and the test via is measured. A property of a core layer of the printed circuit board is identified based on the electrical conductance.

A circuit board, a display module, and a display device are provided. The circuit board includes: a base substrate including a first surface and a second surface opposite to each other; bonding pads on the first surface; test pads electrically connected to the bonding pads and disposed on the second surface; a test auxiliary structure on the second surface; and a metal layer on the second surface. The test auxiliary structure overlaps with the test pads along a first direction which is a direction perpendicular to the first surface and the second surface of the base substrate; and the metal layer includes a metal structure for transmitting a first signal and the test auxiliary structure is insulated from the metal structure.

A power module having a packaging structure includes a substrate having a first conductive area, a second conductive area, a third conductive area, a first fixing area and a second fixing area. The first, the second and the third conductive areas are electrically connected to a first terminal, a second terminal and a third terminal, and the first and the second fixing areas are electrically connected to a first switch set and a second switch set, so that they are in a parallel arrangement. The first terminal is a current input end, the second terminal is an intermediate end, and the third terminal is a current output end. When a current flows from the current input end to the intermediate end, or from the intermediate end to the current output end, the current flows straightly in order to reduce a crossover area and lower the stray inductance.