Patent classifications
H05K1/0269
Wafer level bump stack for chip scale package
A microelectronic device includes a die less than 300 microns thick, and an interface tile. Die attach leads on the interface tile are electrically coupled to die terminals on the die through interface bonds. The microelectronic device includes an interposer between the die and the interface tile. Lateral perimeters of the die, the interposer, and the interface tile are aligned with each other. The microelectronic device may be formed by forming the interface bonds and an interposer layer, while the die is part of a wafer and the interface tile is part of an interface lamina. Kerfs are formed through the interface lamina, through the interposer, and partway through the wafer, around a lateral perimeter of the die. Material is subsequently removed at a back surface of the die to the kerfs, so that a thickness of the die is less than 300 microns.
FLEXIBLE PRINTED CIRCUITS MARKED WITH CONNECTIONS TO VEHICLE CIRCUITS
Flexible circuits are described including markings that indicate connections between their flat-wire conductors and specific circuits of a vehicle electrical system. Wire conductors within the flexible circuit share connections with different circuits of the vehicle electrical system. To indicate a connection between a wire conductor and a vehicle circuit, the flexible circuit includes one or more human or machine-readable marks specifically indicating the connection, in some cases, at a position where the connection is to be made. The marks can include etchings or printings on the wire conductors or printings on or otherwise visible from the insulating body that protects the wire conductors.
ELECTRONIC DEVICE TESTING SYSTEM, ELECTRONIC DEVICE PRODUCTION SYSTEM INCLUDING SAME AND METHOD OF TESTING AN ELECTRONIC DEVICE
There is described an electronic device testing system for testing an electronic device having a substrate on which is printed a metamaterial structure using an ink. The electronic device testing system generally has: a terahertz radiation emitter configured to emit an incident terahertz radiation beam to be incident on the metamaterial structure of the substrate, the incident terahertz radiation beam having power at least at the terahertz resonance frequency of the metamaterial structure; a terahertz radiation receiver configured to receive an outgoing terahertz radiation beam outgoing from the metamaterial structure and to measure an amplitude of an electric field of the outgoing terahertz radiation beam at least at the terahertz resonance frequency; and a controller configured to determine a conductivity value indicative of a conductivity of the ink based on said amplitude of the electric field of the outgoing terahertz radiation beam.
Interconnectable circuit boards
In some embodiments, an interconnectable circuit board may include one or more of the following features: (a) a first electrically conductive pad located on a top of the circuit board, (b) a plated through hole on the conductive pad which passes through the circuit board, (c) a second electrically conductive pad coupled to the plated through hole; the second conductive pad capable of being electrically connected to a third electrically conductive pad attached to a top of a second interconnectable circuit board, (d) cut marks indicating safe locations for separating the circuit board, and (e) a second cut mark adjacent to the first cut mark where the area between the first and second cut mark can be utilized to make a safe cut through the circuit board.
Systems and methods for breadboard-style printed circuit board
The present invention relates generally to electric circuit testing, building, or implementing using a breadboard-style printed circuit board (PCB). Aspects of the present invention include eliminating the need to use hookup wires when building and testing electric circuits on PCBs. In one or more embodiments, a PCB system having rows and columns of signal tie points connected in a breadboard layout and using an embedded wire and a solder bridge to form partial connections between signal tie points may be built. In one or more embodiments, an embedded wire and solder bridge is capable of connecting a column of signal tie points, and/or an embedded wire and solder bridge is capable of connecting a power rail to a signal tie point. Thus, a circuit may be implemented and tested by applying a small amount of solder to the solder bridge without the need for hookup wire.
ECOLOGICAL MULTILAYER STRUCTURE FOR HOSTING ELECTRONICS AND RELATED METHOD OF MANUFACTURE
Integrated multilayer structure for hosting electronics, including a first substrateincluding organic, electrically substantially insulating natural material including and exhibiting a related naturally grown or natural textile based surface texture, said first substrate having a first side facing a predefined front side of the structure, said first side of the first substrate being optionally configured to face a user and/or use environment of the structure or of its host device, and an opposite second side, a plastic layer, optionally including thermoplastic or thermoset plastics, molded onto said second side of the first substrate so as to at least partially cover it, and circuitry provided on the second side of the first substrate, said circuitry being at least partially embedded in the molded material of the plastic layer. Related method of manufacture is presented.
Component mounting machine, feeder device, and splicing work defect determination method
A component mounting machine includes: a feeder device; a component transfer device; a splice portion detecting section detecting a splice portion further on a near side than a supply position of the feeder device; a passing determination section determining if the splice portion is in the passing state in which the splice portion is positioned within a passing area; a suction abnormality determination section determining the suction abnormality state in which a suction nozzle is not able to suck a component; a work defect determination section determining the splicing work defect when the suction abnormality state is determined and the splice portion is determined to be in the passing state; and an abnormality display section that performs dedicated abnormality display when the splicing work defect is determined.
Circuit board having a predetermined punch area and sheet separated from the same
A circuit board includes a substrate, a first measurement mark and a second measurement mark, the first and second measurement marks are located on a predetermined punch area of the substrate. After punching, the predetermined punch area is removed such that the circuit board has a through hole and a sheet is separated from the circuit board. By the first and second measurement marks on the sheet, a first distance between a first edge of the sheet and the first measurement mark and a second distance between a second edge of the sheet and the second measurement mark can be measured to determine whether the through hole is shifted or has an incorrect size.
METHOD FOR PRODUCING A LABELED PRINTED CIRCUIT BOARD
The invention relates to a method for producing a labeled printed circuit board, as well as a labeled electric printed circuit board. In order to provide a method for producing a labeled printed circuit board that is particularly fast and energy-conserving and does not require any systems with high procurement and operating costs, initially a substrate with conductor tracks is supplied which is then coated with a functional lacquer layer on at least one surface, wherein a labeling of the substrate in different color shades of the functional lacquer layer is also carried out.
Measurement apparatus, circuit board, display device, and measurement method
The object of the present invention is to provide a technic for accurately measuring a connection state between a flexible board and a circuit board. A measurement apparatus includes a flexible board connected to a plurality of electrode terminals in a state of being superimposed on the plurality of electrode terminals provided on a circuit board, and a laser displacement meter configured to measure a height distribution of a surface of a connection portion of the plurality of electrode terminals of the circuit board. The plurality of electrode terminals are linearly arranged at a predetermined pitch, and the laser displacement meter is configured to continuously measure a height position of the surface of the connection portion while scanning from one side to an other side in an arrangement direction of the plurality of linearly arranged electrode terminals.