An integrated circuit chip includes a core circuit, a first bond pad, a first switch circuit, a second configuration resistor, a control circuit, and a storage unit. The first bonding pad is coupled to a first external reference voltage through a first node, and the first node is coupled to the first external reference voltage through a bonding wire or a first configuration resistor. The first switch circuit is coupled between a first internal reference voltage and the first node. The second configuration resistor is coupled between the first internal reference voltage and the first switch circuit or between the first switch circuit and the first node. In a first mode, the control circuit turns on the first switch circuit, and writes a configuration state of the first bonding pad to the storage unit. In a second mode, the control circuit turns off the first switch circuit.

There is provided a semiconductor apparatus including a memory controller; a CPU; a high-speed communication controller; a memory operation terminal group that includes a plurality of memory operation terminals for inputting a first signal propagating between an external memory group and the memory controller; a high-speed communication terminal group that includes a plurality of high-speed communication terminals for inputting a second signal to the high-speed communication controller; an inspection terminal group that includes a plurality of inspection terminals for acquiring information from the CPU and performing debugging; and a terminal mounting surface at which the memory operation terminal group, the high-speed communication terminal group, and the inspection terminal group are provided, in which at the terminal mounting surface, a first inspection terminal among the plurality of inspection terminals is located between the memory operation terminal group and the high-speed communication terminal group.

There is provided a semiconductor apparatus including a first high-speed communication controller and a second high-speed communication controller that perform high-speed communication; a first high-speed communication terminal group that includes a first high-speed communication terminal for inputting a first signal; a second high-speed communication terminal group that includes a second high-speed communication terminal for inputting a second signal; and a terminal mounting surface, in which the terminal mounting surface includes a first side and a second side, a shortest distance from the first high-speed communication terminal group to the first side is shorter than a shortest distance from the second high-speed communication terminal group to the first side, and a shortest distance from the second high-speed communication terminal group to the second side is shorter than a shortest distance from the first high-speed communication terminal group to the second side.

There is provided a semiconductor apparatus including: a memory operation terminal for inputting a first signal; a high-speed communication terminal for inputting a second signal to a high-speed communication controller; an inspection terminal for performing debugging; and a terminal mounting surface at which a plurality of coupling terminals including the memory operation terminal, the high-speed communication terminal, and the inspection terminal are provided, in which the terminal mounting surface includes a first side, a second side, a third side, and a fourth side, the plurality of coupling terminals include a first terminal row located adjacent to the third side and arranged from the first side toward the second side; the first terminal row includes a first inspection terminal among the plurality of inspection terminals, and the first inspection terminal is located closest to the first side in the first terminal row.

The present invention provides various aspects for processing multiple types of substrates within cleanspace fabricators or for processing multiple or single types of substrates in multiple types of cleanspace environments. In some embodiments, a collocated composite cleanspace fabricator may be capable of processing semiconductor devices into integrated circuits and then performing assembly operations to result in product in packaged form. Customized smart devices, smart phones and touchscreen devices may be fabricated in examples of a cleanspace fabricator. In some examples, the smart devices, smart phones and touchscreen devices may have two touchscreens on opposite sides of the device along with hardware based encryption.

Surface mount device (SMD) placement to control a signal path in a printed circuit board (PCB), including: adding, to a PCB, a plurality of signal path segments, each signal path segment of the plurality of signal path segments ending at corresponding pad of a plurality of pads, wherein a first pad of the plurality of pads is couplable to a second pad of the plurality of pads to create a first signal path and is couplable to a third pad of the plurality of pads to create a second signal path; and coupling, via a discrete SMD, the first pad and the second pad to create the first signal path comprising a first signal path segment of the plurality of signal path segments and a second signal path segment of the plurality of signal path segments.

A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. The devices in each group are connected in parallel so that each group acts as a single device. In one embodiment, about 10 devices are contained in each group so the redundancy makes each group very reliable. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.

The present invention relates generally to electric circuit testing, building, or implementing using a breadboard-style printed circuit board (PCB). Aspects of the present invention include eliminating the need to use hookup wires when building and testing electric circuits on PCBs. In one or more embodiments, a PCB system having rows and columns of signal tie points connected in a breadboard layout and using an embedded wire and a solder bridge to form partial connections between signal tie points may be built. In one or more embodiments, an embedded wire and solder bridge is capable of connecting a column of signal tie points, and/or an embedded wire and solder bridge is capable of connecting a power rail to a signal tie point. Thus, a circuit may be implemented and tested by applying a small amount of solder to the solder bridge without the need for hookup wire.

A thermally expandable material includes microcapsules and a binder having a conducting property, each microcapsule including a shell having an insulating property, and a thermally expandable component contained in the shell and having a property of expanding by heating, the shell deforming due to expansion of the thermally expandable component to come in contact with another capsule and have an insulating state with the other capsule.

A microcapsule includes a shell including a conducting component, and a thermally expandable component contained in the shell and having a property of expanding by heating. The shell is deformable in accordance with expansion of the thermally expandable component when the thermally expandable component is heated.