Patent classifications
H05K1/0298
SUBSTRATE FOR PRINTED CIRCUIT BOARD, PRINTED CIRCUIT BOARD, AND METHOD FOR PRODUCING PRINTED CIRCUIT BOARD
A substrate for a printed circuit board according to an embodiment of the present invention includes a base film having insulating properties and a sintered layer formed of a plurality of metal particles, the sintered layer being stacked on at least one surface of the base film, in which a region of the sintered layer extending from an interface between the sintered layer and the base film to a position 500 nm or less from the interface has a porosity of 1% or more and 50% or less.
RESIN, PHOTOSENSITIVE RESIN COMPOSITION, ELECTRONIC COMPONENT AND DISPLAY DEVICE USING THE SAME
A resin having a small linear thermal expansion coefficient and a low absorbance is provided. The resin is characterized by including at least one structure selected from structures represented by the following general formulae (1) and (2):
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Axial field rotary energy device with segmented PCB stator having thermally conductive layer
An axial field rotary energy device has a PCB stator panel assembly between rotors with an axis of rotation. Each rotor has a magnet. The PCB stator panel assembly includes PCB panels. Each PCB panel can have layers, and each layer can have conductive coils. The PCB stator panel assembly can have a thermally conductive layer that extends from an inner diameter portion to an outer diameter portion thereof. Each PCB panel comprises discrete, PCB radial segments that are mechanically and electrically coupled together to form the respective PCB panels.
IMPLANTABLE THIN FILM DEVICES
Implementations described and claimed herein provide thin film devices and methods of manufacturing and implanting the same. In one implementation, a shaped insulator is formed having an inner surface, an outer surface, and a profile shaped according to a selected dielectric use. A layer of conductive traces is fabricated on the inner surface of the shaped insulator using biocompatible metallization. An insulating layer is applied over the layer of conductive traces. An electrode array and a connection array are fabricated on the outer surface of the shaped insulator and/or the insulating layer, and the electrode array and the connection array are in electrical communication with the layer of conductive traces to form a flexible circuit. The implantable thin film device is formed from the flexible circuit according to the selected dialectic use.
POWER ELECTRONIC ASSEMBLY HAVING A LAMINATE INLAY AND METHOD OF PRODUCING THE POWER ELECTRONIC ASSEMBLY
A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a laminate inlay embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the laminate inlay and configured to distribute a load current switched by the laminate inlay. A fourth metal layer is positioned between the second metal layer and the laminate inlay and configured as a primary thermal conduction path for heat generated by the laminate inlay during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
Method for contacting and rewiring an electronic component embedded into a printed circuit board
A method for contacting and rewiring an electronic component embedded in a PCB in the following manner is disclosed. A first permanent resist layer is applied to one contact side of the PCB. The first permanent resist layer is structured to produce exposures in the area of contacts of the electronic component. A second permanent resist layer is applied onto the structured first permanent resist layer. The second permanent resist layer is structured to expose the exposures in the area of the contacts and to produce exposures in line with the desired conductor tracks. The exposures are chemically coated with copper the copper is electric-plated to the exposures. Excess copper in the areas between the exposures is removed.
LIQUID CRYSTAL POLYMER FILM, LIQUID CRYSTAL POLYMER FILM WITH CONDUCTOR LAYER, AND MULTILAYER SUBSTRATE
A liquid crystal polymer film that includes: a benzene ring; a naphthalene ring; and a carboxymethyl group, wherein, in a .sup.13C-NMR spectrum of a liquid crystal polymer film decomposed with supercritical methanol, an integral value CA of a peak derived from the benzene ring, an integral value CB of a peak derived from the naphthalene ring, and an integral value CC of a peak derived from the carboxymethyl group satisfy (CA+CB)/CC of 1.35 to 1.65.
Semiconductor device, circuit board structure and manufacturing method thereof
A semiconductor device, a circuit board structure and a manufacturing forming thereof are provided. A circuit board structure includes a core layer, a first build-up layer and a second build-up layer. The first build-up layer and the second build-up layer are disposed on opposite sides of the core layer. The circuit board structure has a plurality of stress releasing trenches extending into the first build-up layer and the second build-up layer.
Multi-layer 3D foil package
The invention relates to a multi-layer 3D foil package and to a method for manufacturing such a multi-layer 3D foil package. The 3D foil package has a foil substrate stack having at least two foil planes, wherein a first electrically insulating foil substrate is arranged in a first foil plane, and wherein a second electrically insulating foil substrate is arranged in a second foil plane, wherein the first foil substrate has a first main surface region on which at least one functional electronic component is arranged, wherein the second foil substrate has a cavity having at least one opening in the second main surface region, wherein the foil substrates within the foil substrate stack are arranged one above the other such that the functional electronic component arranged on the first foil substrate is arranged within the cavity provided in the second foil substrate.
Designing a printed circuit board (PCB) to detect slivers of conductive material included within vias of the PCB
A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.