A film type package includes: a base film having first and second sides; a driver integrated circuit mounted on the base film; first connection pads disposed on a first area of the base film that is adjacent to the first side of the base film, and configured to be connected to a first external circuit; second connection pads disposed on a second area of the base film that is adjacent to the second side of the base film, and configured to be connected to a second external circuit; first signal lines disposed on the base film, and connecting the driver integrated circuit and the first connection pads; second signal lines disposed on the base film, and connecting the driver integrated circuit and the second connection pads; and a plurality of test lines extending from the driver integrated circuit to the first side of the base film.

A wiring substrate includes a first insulating layer, a conductor layer formed on the first insulating layer, a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductor layer, and a coating film formed on a surface of the conductor layer such that the coating film is adhering the conductor layer and the second insulating layer. The conductor layer includes a conductor pad and a wiring pattern, and the conductor pad of the conductor layer has a mounting surface including a first region and a component mounting region formed such that the second insulating layer has a through hole exposing the component mounting region and that the first region is covered by the second insulating layer and roughened to have a surface roughness higher than a first surface roughness of a surface of the wiring pattern facing the second insulating layer.

A semiconductor-based capacitor can include a substrate including a semiconductor material, an oxide layer formed over the substrate, a conductive layer formed over at least a portion of the oxide layer, a plurality of distinct coplanar upper terminals, and a lower terminal. The upper terminals and the lower terminal can be exposed along the top and bottom surfaces of the substrate, respectively, for embedding the capacitor in a substrate such as a circuit board. The semiconductor-based capacitor can be sufficiently miniaturized to be embeddable within a circuit board while providing superior capacitance values without compromising the integrity of the capacitor. For example, each of the upper terminals can have a maximum width and a thickness normal to the maximum width, and a ratio of the width to the thickness can be greater than about 80:1 to prevent physical damage to the capacitor from warping or cracking.

A printed wiring board includes a core substrate including core material and having opening such that the opening penetrates through the core substrate, thermoelectric elements including P-type and N-type thermoelectric elements such that the thermoelectric elements are accommodated in the opening of the core substrate, a first build-up layer that mounts a heat-absorbing element thereon and includes a first resin insulating layer such that the first resin insulating layer is formed on first surface of the core substrate and covering the opening of the core substrate, and a second build-up layer that mounts a heat-generating element thereon and includes a second resin insulating layer such that the formed on the second resin insulating layer is foamed on second surface of the core substrate on the opposite side and covering the opening of the core substrate and has thickness that is greater than thickness of the first resin insulating layer.

An inductor component includes a main body formed in a flat-plate shape and including a magnetic layer; an inductor wiring line disposed on a plane inside the main body; a first vertical wiring line that extends, from a pad portion which is an end portion of the inductor wiring line, in a first direction to pass through the inside of the main body, and is exposed on a first principal surface side of the main body; a second vertical wiring line that extends, from the pad portion of the inductor wiring line, in a second direction to pass through the inside of the main body, and is exposed on a second principal surface side of the main body; and an insulation layer of a non-magnetic body. The first vertical wiring line includes a via conductor and a columnar wiring line. The second vertical wiring line includes a columnar wiring line.

An integrated fan out package is utilized in which the dielectric materials of different redistribution layers are utilized to integrate the integrated fan out package process flows with other package applications. In some embodiments an Ajinomoto or prepreg material is utilized as the dielectric in at least some of the overlying redistribution layers.

According to one embodiment, a flexible substrate includes a line portion including a support plate including a first surface, a flexible insulating base located on the first surface and a wiring layer disposed on the insulating base, a piezoelectric material covering the line portion, a protective member located on the piezoelectric material and an island-shaped first electrode provided on the insulating base.

A circuit board utilizing the better and faster performance of optical signals includes interconnected first, second, and third areas. The first area includes a first circuit substrate, and a first coupling element and a chip connected thereon. The second area includes an optical fiber within an insulating layer. The third area includes a second circuit substrate, and a second coupling element and an electronic element connected thereon. The first coupling element and the second coupling element are optically aligned with the optical fiber for signal reception and transmission. A method for manufacturing such composite circuit board is also disclosed.

Printed circuit board (PCB) substrates include at least one pre-preg layer interposed between one or more electrically conductive layers, power device stacks, each having a power device embedded within the PCB substrate in a vertical stack configuration, and a flat heat pipe positioned between the power device stacks within the at least one pre-preg layer, one surface of the flat heat pipe directly bonded to a first one of the power device stacks and an opposite surface of the flat heat pipe thermally coupled to a second one of the power device stacks.

A wiring board includes an insulating layer, a thin film capacitor laminated on the insulating layer, an interconnect layer electrically connected to the thin film capacitor, and an encapsulating resin layer laminated on the thin film capacitor. The interconnect layer includes a pad protruding from the thin film capacitor. The encapsulating resin layer is a mold resin having a non-photosensitive thermosetting resin as a main component thereof. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad.