A wiring substrate includes an insulating layer including a projection and a wiring layer on the projection. The wiring layer includes a first metal layer on an end face of the projection and a second metal layer on the first metal layer. The width of the end face of the projection is different from at least one of the width of the first metal layer and the width of the second metal layer. An inner wall surface and a bottom surface of a depression around the projection are roughened surfaces.

The present invention includes a method of making a RF impedance matching device in a photo definable glass ceramic substrate. A ground plane may be used to adjacent to or below the RF Transmission Line in order to prevent parasitic electronic signals, RF signals, differential voltage build up and floating grounds from disrupting and degrading the performance of isolated electronic devices by the fabrication of electrical isolation and ground plane structures on a photo-definable glass substrate.

Provided herein is a method for forming a transparent electrode film for display and the transparent electrode film for display, the method comprising forming an electrode pattern by printing a fine electrode pattern on a release film using a conductive ink composition; forming an insulating layer by applying an insulating resin on the release film on which the electrode pattern has been formed; forming a substrate layer by laminating a substrate on the insulating layer; and removing the release film.

An electronic device may have layers of glass for forming components such as a display. A display cover glass layer may overlap an array of pixels. A touch sensor may be formed under the display cover glass layer. Conductive structures such as transparent conductive electrodes or other conductive layers of material may be formed on the outer surface of the display cover glass layer. The electrodes on the outer surface of the display cover glass layer may be coupled to metal contacts and other circuitry on the inner surface of the display cover glass layer using conductive vias. Vias may be provided with barrier layers, opaque coatings, tapers, and other structures and may be formed using techniques that enhance compatibility with chemical strengthening processes.

A composite circuit board includes a composite circuit board unit, a first solder mask formed on a first metal protection layer of the composite circuit board unit, and a second solder mask formed on a second metal protection layer of the composite circuit board unit. Two ends of a first outer conductive circuit are bent back toward each other and spaced apart a predetermined distance to form a first window. Two ends of a second outer conductive circuit are bent back toward each other and spaced apart a predetermined distance to form a second window.

A method of manufacturing a glass substrate that has a through hole, includes (1) forming an initial hole in a glass substrate by irradiating laser light from a first surface side of the glass substrate; (2) performing a first etching process using a first etching solution to form, from the initial hole, a first through hole that extends from a first opening formed at a first surface to a second opening formed at a second surface, and to make a ratio “d.sub.1/R.sub.t1” of a thickness “d.sub.1” of the glass substrate with respect to a diameter “R.sub.t1” of the first opening to be within a range between 10 to 20; and (3) performing a second etching process to enlarge the first through hole using a second etching solution, whose etching rate with respect to the glass substrate is faster than that of the first etching solution.

A circuit board includes an inorganic material insulating layer, a first circuit pattern layer formed on a surface of the inorganic material insulating layer, a first build-up insulating layer formed on the inorganic material insulating layer and formed of an organic material, and a second circuit pattern layer formed on a surface of the first build-up insulating layer.

A method of manufacturing a cover window for a display device includes: providing a glass substrate having a bendable area and a flat area; modifying the bendable area by irradiating the glass substrate with a beam; and etching the bendable area to have a thinner thickness than the flat area. The bendable area may have a faster etch rate than the flat area due to the modifying of the bendable area.

A wafer-level manufacturing method for embedding a passive element in a glass substrate is disclosed. A highly doped silicon wafer is dry etched to form a highly doped silicon mould wafer, containing highly doped silicon passive component structures mould seated in cavity arrays; a glass wafer is anodically bonded to the highly doped silicon mould wafer in vacuum pressure to seal the cavity arrays; the bonded wafers are heated so that the glass melts and fills gaps in the cavity arrays, annealing and cooling are performed, and a reflowed wafer is formed; the upper glass substrate of the reflowed wafer is grinded and polished to expose the highly doped silicon passives; the passive component structure mould embedded in the glass substrate is fully etched; the blind holes formed in the glass substrates after the passive component structure mould has been etched is filled with copper by electroplating; the highly doped silicon substrate and unetched silicon between the cavity arrays are etched, and several glass substrates embedded with a passive element are obtained; to form electrodes for the passives, a metal adhesion layer is deposited, and a metal conductive layer is electroplated. The process is simple, costs are low, and the prepared passive elements have superior performance.

A wiring board includes an insulating layer; an insulating oxide film that is formed by forming a film of metal oxide or semimetal oxide on a surface of the insulating layer; a seed layer that is made of metal and that is stacked on the insulating oxide film; and an electrode that is made of metal and that is formed on the seed layer, wherein the insulating oxide film and the seed layer are removed from an area not overlapping the electrode to expose the insulating layer.