Patent classifications
H05K3/002
Method of manufacturing printed circuit board
A method of manufacturing a printed circuit board includes providing an insulating layer, forming a plating seed layer on the insulating layer, forming a first circuit pattern on the plating seed layer and a second circuit pattern on the first circuit pattern, and forming a top metal layer on the second circuit pattern. The second circuit pattern can be thinner than the first circuit pattern, and the top metal layer can be wider than the second circuit pattern.
Method of producing a wired circuit board
A method for producing a wired circuit board, the method including the steps of: a first step of providing an insulating layer having an opening penetrating in the thickness direction at one side surface in the thickness direction of the metal plate, a second step of providing a first barrier layer at one side surface in the thickness direction of the metal plate exposed from the opening by plating, a third step of providing a second barrier layer continuously at one side in the thickness direction of the first barrier layer and an inner surface of the insulating layer facing the opening, a fourth step of providing a conductor layer so as to contact the second barrier layer, and a fifth step of removing the metal plate by etching.
Manufacturing method for printed circuit board
A manufacturing method for a printed circuit board includes: transferring roughness of a metal film to an insulating layer by laminating the metal film on the insulating layer, the metal film having the roughness formed on one surface thereof and having a discrete metal layer laminated thereon; exposing a surface of the insulating layer, on which the roughness is transferred, by removing the metal film; processing the surface of the insulating layer having the roughness formed thereon with an acidic solution; and forming a circuit pattern on the insulating layer by a plating process.
METHOD OF MANUFACTURING WIRING BOARD
A method of manufacturing a wiring board, includes forming an interconnect layer on a first insulating layer, roughening a surface of the interconnect layer, not in contact with the first insulating layer, to form concavo-convex portions, forming a bond enhancing film on the concavo-convex portions, partially removing the bond enhancing film, using an acid solution, and forming a second insulating layer on the first insulating layer, to cover the interconnect layer.
Wiring Substrate, Method Of Manufacturing Wiring Substrate, Inkjet Head, MEMS Device, And Oscillator
A wiring substrate includes a first substrate having a first surface and a second surface at an opposite side to the first surface, a first interconnection disposed on the first surface, a second interconnection disposed on the second surface, and a through interconnection electrically coupling the first interconnection and the second interconnection to each other, and penetrating the first substrate, wherein the through interconnection includes a first through interconnection coupled to the first interconnection, and a second through interconnection coupled to the second interconnection, and the first through interconnection and the second through interconnection partially overlap each other in a plan view from a thickness direction of the first substrate.
Impedence Matching Conductive Structure for High Efficiency RF Circuits
The present invention includes a method of making a RF impedance matching device in a photo definable glass ceramic substrate. A ground plane may be used to adjacent to or below the RF Transmission Line in order to prevent parasitic electronic signals, RF signals, differential voltage build up and floating grounds from disrupting and degrading the performance of isolated electronic devices by the fabrication of electrical isolation and ground plane structures on a photo-definable glass substrate.
Process for forming traces on a catalytic laminate
A process for making a circuit board from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth includes drilling holes, etching the surface to expose the catalytic particles, electroless plating the unmasked areas, applying a mask to the etched surface, electroplating the exposed areas using the electroless plating to form a continuous conductor, then stripping the mask and etching away the electroless copper deposition.
GLASS CORE DEVICE AND METHOD OF PRODUCING THE SAME
A glass core device with a wiring pattern on a first surface of a glass core and a wiring pattern on a second surface thereof being electrically connected via a wiring pattern embedded in TGVs formed in the glass core. In a state of being cut out by dicing, each glass core has a second surface and side faces which are continuously covered with an outer protective layer.
SUBSTRATE INTEGRATED WAVEGUIDE AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing a substrate integrated waveguide for a millimeter wave signal is disclosed. In the method, a gold layer is disposed on a top surface of the silicon substrate using a lift-off process. Next, two parallel rows of substantially equal spaced vias are formed in the silicon substrate using a through-silicon-via etching process. Then, a copper layer is disposed on the bottom side of the silicon substrate and on interior surfaces of each via. The separation between the copper layer and the gold layer define a height of the substrate integrated waveguide, while the separation between the two parallel rows of substantially equal spaced vias define a width of the substrate integrated waveguide. In some implementations the length of the substrate defines a length of the substrate integrated waveguide, and the length, width, and height define a resonator that is resonant at a millimeter wave frequency.
Method for manufacturing circuit board
The present disclosure relates to a method for manufacturing a circuit board. The method for manufacturing the circuit board includes forming a patterned first dielectric layer on a substrate; forming an adhesive layer on the patterned first dielectric layer; forming a second dielectric layer on the adhesive layer; and patterning the second dielectric layer and the adhesive layer.