A wire extends through a ceramic body. The wire comprises a material selected from the group consisting of platinum, palladium, rhodium, iridium, osmium and alloys of platinum, palladium, rhodium, iridium, and osmium. The wire directly contacts the ceramic body to form a substantially hermetic seal between the ceramic body and the wire.

A circuit board includes: a first surface and a second surface opposite to the first surface; a through hole extending between the first surface and the second surface; a conductor covering an inner wall surface of the through hole, a first end and a second end of the conductor being terminated inside the through hole; and a wire connected to the conductor, wherein a sum of a length from a contact portion where the conductor contacts a connector pin inserted in the through hole to the first end of the conductor, and a length from a wire connecting portion where the conductor is connected to the wire to the second end of the conductor is 0.5 mm or less.

A passive device packaging structure embedded in a glass medium according to an embodiment of the present disclosures includes a glass substrate and at least one capacitor embedded in the glass substrate. The capacitor includes an upper electrode, a dielectric layer, and a lower electrode. The glass substrate is provided on its upper surface with a cavity, the dielectric layer covers a surface of the cavity and has an area larger than that of the cavity. The upper electrode is provided on the dielectric layer. The dielectric layer and the lower electrode are connected by a metal via pillar passing through the glass substrate.

A printed board includes: a depression formed in at least one surface of a board; an open hole formed in the board so as to penetrate the board from a bottom portion of the depression; and a conductor formed over an edge of an opening portion of the open hole and an inner surface of the open hole.

A module includes a PCB including a substrate, a component pad and at least one wire pad, an SMT component mounted to a component pad, a wire fence, a mold compound and a top conductive layer. Each wire pad is connected to ground by a corresponding via extending through the substrate, and the wire fence includes wire loops connected to each wire pad. The mold compound is disposed over the PCB, the SMT component and the wire fence, and defines multiple holes extending partially through the mold compound to top-edges of the wire loops, respectively, where a conductive material fills the holes. The top conductive layer is disposed over the mold compound, and is in electrical contact with the conductive material filling the holes. The wire fence, the conductive material, and the top conductive layer provide shielding of the SMT component from electromagnetic radiation.

A method for producing a printed circuit board (13, 15, 16) with multilayer subareas in sections, characterized by the following steps: a) providing at least one conducting foil (1, 1′) and application of a dielectric insulating foil (3, 3′) to at least one subarea of the conducting foil; b) applying a structure of conducting paths (4, 4′) to the insulating layer (3, 3′); c) providing one further printed circuit board structure; d) joining of the further printed circuit board structure with the conducting foil (1, 1′) plus insulating layer (3, 3′) and conducting paths (4, 4′) by interposing a prepreg layer (5, 85; 18, 18′), and e) laminating the parts joined in step d) under pressing pressure and heat; and a printed circuit board produced according to this method.

A 3D printed drilling template (20, 30a, 30b, 30c) including: a rigid framework able to be manipulated by an operator or an automaton, and a set of traversing (22, 32a, 32b, 32c, 33c) orifices in the framework and arranged to guide the drilling of holes into a structure on which the drilling template is mounted, wherein the drilling template (20, 30a, 30b, 30c) is designed or revised on an ad-hoc basis and manufactured by 3D printing and using a 3D printing material based on a polymer material mixed with powdered graphene.

Embodiments may include inductors with embedded magnetic cores and methods of making such inductors. In an embodiment, an integrated circuit package may include an integrated circuit die with a multi-phase voltage regulator electrically coupled to the integrated circuit die. In such embodiments, the multi-phase voltage regulator may include a substrate core and a plurality of inductors. The inductors may include a conductive through-hole disposed through the substrate core and a plugging layer comprising a dielectric material surrounding the conductive through-hole. In an embodiment, a magnetic sheath is formed around the plugging layer. In an embodiment, the magnetic sheath is separated from the plated through hole by the plugging layer. Additionally, a first layer comprising a dielectric material may be disposed over a first surface of the magnetic sheath, and a second layer comprising a dielectric material may be disposed over a second surface of the magnetic sheath.

A method for manufacturing a wiring board includes preparing a large-sized wiring board having an effective region and a dummy region such that the board has a penetrating hole on a border of the effective and dummy regions and an inner-hole conductive layer covering an inner surface of the penetrating hole, moving a rotary tool having a tip blade along rotation axis at a peripheral portion of the penetrating hole such that the rotary tool drills a hole into the board at the peripheral portion and segments the conductive layer into portions in the effective and dummy regions, and moving a rotary tool having a side blade in a direction perpendicular to rotation axis such that the dummy region is cut off from the effective region after the rotary tool having tip blade makes the hole and a wiring board having the effective region of the board is formed.

A stub of a via formed in a printed circuit board is backdrilled to a predetermined depth. A capacitance probe is positioned within the via. Then the capacitance probe is used to obtain a test capacitance measurement. The test capacitance measurement is compared to a predetermined baseline capacitance measurement. Residual conductive plating material in the backdrilled stub causes the test capacitance measurement to exceed the predetermined baseline capacitance measurement. An indication is made that the predetermined baseline capacitance measurement has been exceeded.