A component carrier includes a layer stack formed of an electrically insulating structure and an electrically conductive structure with a bore extending into the layer stack. The bore includes a first bore section with a first diameter and a connected second bore section with a second diameter differing from the first diameter. The component carrier further comprises a thermally conductive material filling substantially the entire bore. The bore is in particular formed by mechanical drilling.

The present invention pertains to a glass characterized by: containing 72-82% of Li.sup.+, 0-21% of Si.sup.4+, and 0-28% of B.sup.3+ in terms of cation %; and containing at least 70% and less than 100% of O.sup.2− and more than 0% and at most 30% of Cl.sup.−, containing at least 94% and less than 100% of O.sup.2− and more than 0% and at most 6% of S.sup.2−, or containing at least 64% and less than 100% of O.sup.2−, more than 0% and at most 30% of Cl.sup.−, and more than 0% and at most 6% of S.sup.2−, in terms of anion %.

The invention relates to an ultrasonic transducer (10) of the type comprising a housing (16) provided with an electrical connector (17), at least one ultrasonic transducer (15) and an electronic card (13) for controlling the transducer and which is arranged inside the housing and consists of a printed circuit board (14) on which active components (11) and passive components (12) are mounted. According to the invention, the active components include integrated active components (11) which are completely embedded in a substrate of the printed circuit board and the passive components include integrated passive components (12) which are completely embedded in the substrate. According to another feature, the active components and the passive components include surface-mounted components (7) arranged solely on one side of the printed circuit board and the transducer is mounted on an opposite side.

A component carrier includes a stack with a plurality of electrically conductive layer structures and at least one electrically insulating layer structure. The electrically conductive layer structures include an electrically conductive vertical through-connection and a horizontally extending electrically conductive trace electrically coupled with an end portion of the vertical through-connection. A back-drill hole extends through at least part of the at least one electrically insulating layer structure towards the end portion of the vertical through-connection. An etching neck connects the back-drill hole with the end portion of the vertical through-connection.

A circuit board includes a baseboard, a first conductive circuit layer, a second conductive circuit layer, at least one through hole, and a number of conductive lines. The first conductive circuit layer includes a number of first conductive circuit lines formed on a first side of the baseboard. The second conductive circuit layer includes a number of second conductive circuit lines formed on a second side of the baseboard. The through hole is defined through the first conductive circuit layer, the baseboard, and the second conductive circuit layer. The number of conductive lines are formed in an inner wall of the through hole and spaced apart around the through hole. Each conductive line electrically couples one of the first conductive circuit lines to a corresponding one of the second conductive circuit lines.

The present disclosure discloses a circuit board and a manufacturing method thereof. The manufacturing method of the circuit board comprises: forming an electroplated coating on a board body of the circuit board; performing image transfer on the board body; drilling the board body after image transfer to remove a copper layer, adjacent to the two sides of a gold finger, on the circuit board, thereby forming a strip; performing forward and reverse routing towards directions away from each other respectively at the two sides of each gold finger to form a first routing tape and a second routing tape, wherein the first routing tape and the second routing tape are connected to the two ends of the strip respectively; and removing burrs on a surface of the board body through an etching process.

A process of fabricating a circuit includes providing a first sheet of dielectric material including a first top surface having at least one first conductive trace and a second sheet of dielectric material including a second top surface having at least one second conductive trace, depositing a first solder bump on the at least one first conductive trace, applying the second sheet of dielectric material to the first sheet of dielectric material with bonding film sandwiched in between, bonding the first and second sheets of dielectric material to one another, and providing a conductive material to connect the first solder bump on the at least one first conductive trace to the at least one second conductive trace.

A measurement system is provided, including a measurement machine and a computer. The measurement machine is configured to measure a thickness T1 of a to-be-tested circuit board and a drilling depth D1 of the to-be-tested circuit board. The computer calculates a length S1 of a residual conductive portion in a back drilled hole of the to-be-tested circuit board according to a thickness T of a reference circuit board, a drilling depth D of the reference circuit board, a length S of a residual conductive portion in a back drilled hole of the reference circuit board, the thickness T1 of the to-be-tested circuit board and the drilling depth D1 of the to-be-tested circuit board.

Carrier board structure with an increased core-layer trace area and method for manufacturing the same are introduced. The carrier board structure comprises a core layer structure, a first circuit build-up structure, and a second circuit build-up structure. The core layer structure comprises a core layer, a signal transmission portion, and an embedded circuit layer, wherein the signal transmission portion and the embedded circuit layer are disposed inside the core layer and electrically connected. The first circuit build-up structure is disposed on the core layer on a same side as the embedded circuit layer and is electrically connected to the embedded circuit layer. The second circuit build-up structure is disposed on the core layer on a same side as the signal transmission portion, and is electrically connected to the first circuit build-up structure through the signal transmission portion and the embedded circuit layer.

A radio frequency connector includes a substrate, a first ground plane disposed upon the substrate, a signal conductor having a first contact point, with the first contact point being configured to electrically mate with a second contact point, and a first ground boundary configured to electrically mate with a second ground boundary, with the first ground boundary being formed as an electrically continuous conductor within the substrate.