Provided is a chemical mechanical polishing composition to be used for forming a circuit board including a resin substrate on which a wiring layer containing copper or a copper alloy is provided, the chemical mechanical polishing composition including: (A) at least one selected from a group consisting of carboxyl group-containing organic acids and salts thereof; (B) a basic compound having a first acid dissociation constant (pKa) of 9 or more; and (C) abrasive grains, wherein the component (A) has a complex stability constant with copper of 5 or less, and wherein the chemical mechanical polishing composition has a pH value of from 1 to 3.

Provided is a chemical mechanical polishing composition to be used for forming a circuit board including a resin substrate on which a wiring layer containing copper or a copper alloy is provided, the chemical mechanical polishing composition including: (A) at least one selected from a group consisting of organic acids and salts thereof; (B) a phosphorus-containing compound; and (C) abrasive grains each having an absolute value of a zeta potential in the composition of 5 mV or more, wherein, when a content of the component (A) in the composition is represented by M.sub.A mass % and a content of the component (B) therein is represented by M.sub.B mass %, a ratio M.sub.A/M.sub.B of the content of the component (A) to the content of the component (B) ranges from 1 to 10, and wherein the chemical mechanical polishing composition has a pH value of from 1 to 3.

A component carrier including an electrically insulating core, at least one electronic component embedded in the core, and a coupling structure with at least one electrically conductive through-connection extending at least partially therethrough and having a component contacting end and a wiring contacting end. The electronic component directly contacts the component contacting end. The wiring contacting end is directly electrically contacted to the wiring structure. The exterior surface portion of the coupling structure has homogeneous ablation properties and surface recesses filled with an electrically conductive wiring structure. A method includes embedding an electronic component in an electrically insulating core, providing a coupling structure with a conductive connection having a component end and a wiring end, connecting the electronic component directly to the component end, providing a surface portion of the coupling structure with homogeneous ablation properties, patterning the surface portion with recesses and filling the recesses with a wiring structure such that the wiring end is contacted directly.

A package substrate includes a dielectric layer, a first circuit layer, a second circuit layer and at least one electrically conductive pole. The dielectric layer includes a first side and a second side opposite to the first side. The first circuit layer is located at the first side of the dielectric layer, and includes a plurality of spaced first circuit patterns embedded into the dielectric layer. The second circuit layer is located at the second side of the dielectric layer, and includes a plurality of spaced second circuit patterns located on the second side the dielectric layer. The electrically conductive pole electrically couples the first circuit layer to the second circuit layer. Each of the first circuit patterns has an extension direction from the first side toward the second side, and has widths gradually decreasing along the extension direction.

A single-layer redistribution plate functioning as a space translator between a device under testing (DUT) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.

A plating solution including a metal salt, a hydrophilic fullerene, and water, a metal composite material including a hydrophilic fullerene and a method of manufacturing the same, and a wire, a flexible printed circuit (FPC), and an electronic device including the metal composite material.

Disclosed are apparatus and methods for arrayed embedded magnetic components that include magnetic devices that have a core that is embedded between two or more substrates and a winding pattern surrounding the core that is implemented on and through the two or more substrates. The winding pattern is operable to induce a magnetic flux within the core when energized by a time varying voltage potential. The winding pattern may be implemented by printed circuit layers, plated vias, other electrically conductive elements, and combinations thereof. Arrayed embedded magnetic components include two or more electrically interconnected magnetic devices positioned side-by-side in a horizontal integration, positioned top-to-bottom in a vertical integration, or combinations thereof. The magnetic devices may have a magnetic functionality such as, but not limited to, a transformer, inductor, and filter. Disclosed magnetic components and methods provide for low cost construction, consistent performance, and a low profile form, among other benefits.

Disclosed is a wiring substrate including: a first wiring layer, a second wiring layer disposed on the first wiring layer interposed by an insulating film, and a via conductor passing through the insulating film in a thickness direction, the via conductor electrically connecting the first wiring layer and the second wiring layer. The second wiring layer and the via conductor include a second sintered metal layer and a first sintered metal layer arranged to surround the second sintered metal layer, and an average particle diameter of first metal particles forming the first sintered metal layer is smaller than an average particle diameter of second metal particles forming the second sintered metal layer.

A chip part includes a substrate having a first main surface on one side thereof and a second main surface on the other side thereof, a functional device famed at a first main surface side of the substrate, an external terminal formed at the first main surface side of the substrate and electrically connected to the functional device, and a light diffusion reflection structure formed at a second main surface side of the substrate and diffusely reflecting light irradiated toward the second main surface of the substrate.

Disclosed is a wiring substrate including: a first wiring layer, a second wiring layer disposed on the first wiring layer interposed by an insulating film, and a via conductor passing through the insulating film in a thickness direction, the via conductor electrically connecting the first wiring layer and the second wiring layer. The second wiring layer and the via conductor include a second sintered metal layer and a first sintered metal layer arranged to surround the second sintered metal layer, and an average particle diameter of first metal particles forming the first sintered metal layer is smaller than an average particle diameter of second metal particles forming the second sintered metal layer.