An instrument panel as a vehicular panel includes a panel body on a surface side of which key tops are installed, a printed wiring section arranged on the surface side of the panel body, and an insulation outer layer arranged on the surface side of the panel body so as to cover the printed wiring section.

Embodiments describe the selective electroless plating of dielectric layers. According to an embodiment, a dielectric layer is patterned to form one or more patterned surfaces. A seed layer is then selectively formed along the patterned surfaces of the dielectric layer. An electroless plating process is used to deposit metal only on the patterned surfaces of the dielectric layer. According to an embodiment, the dielectric layer is doped with an activator precursor. Laser assisted local activation is performed on the patterned surfaces of the dielectric layer in order to selectively form a seed layer only on the patterned surfaces of the dielectric layer by reducing the activator precursor to an oxidation state of zero. According to an additional embodiment, a seed layer is selectively formed on the patterned surfaces of the dielectric layer with a colloidal or ionic seeding solution.

A circuit board includes a dielectric layer, a first circuit layer, a second circuit layer and at least an electrically conductive pole. The dielectric layer includes a first side and a second side opposite to the first side. The first circuit layer is located at the first side of the dielectric layer, and includes a plurality of spaced first circuit patterns embedded into the dielectric layer. The second circuit layer is located at the second side of the dielectric layer, and includes a plurality of spaced second circuit patterns located outsides the dielectric layer. The electrically conductive pole electrically couples the first circuit layer to the second circuit layer. Each of the first circuit patterns has an extension direction from the first side toward the second side, and has widths thereof gradually decreasing along the extension direction. A method for manufacturing the circuit board is also provided.

Wiring boards, including an embedded type wiring boards and flexible wiring boards, may be produce by: (1) preparing a wiring layer-attached base including a base and a wiring layer provided on at least one surface of the base, (2) laminating an adhesive sheet including (i) a thermosetting resin composition layer and (ii) a resin film layer on the wiring layer-attached base so that the wiring layer will be embedded in (i) the thermosetting resin composition layer and performing thermal curing to form an insulating layer, (3) forming via holes in the insulating layer, (4) forming a conductor layer, and (5) removing the base.

A method for manufacturing a circuit board structure is provided. First, a first circuit layer is formed on a carrier. Then, a first dielectric layer is formed on the carrier and the first circuit layer. Thereafter, at least one first hole is formed in the first dielectric layer to expose a portion of the first circuit layer. Then, a second dielectric layer is formed on the first dielectric layer and the first circuit layer. Thereafter, at least one trench and at least one second hole are formed in the second dielectric layer, in which the trench exposes a portion of the first dielectric layer, and the second hole exposes the portion of the first circuit layer. The second hole is disposed in the first hole. Then, a metal layer is formed to fill the trench and the second hole.

A method for manufacturing a circuit board structure is provided. First, a first circuit layer is formed on a carrier. Then, a first dielectric layer is formed on the carrier and the first circuit layer. Thereafter, at least one first hole is formed in the first dielectric layer to expose a portion of the first circuit layer. Then, a second dielectric layer is formed on the first dielectric layer and the first circuit layer. Thereafter, at least one trench and at least one second hole are formed in the second dielectric layer, in which the trench exposes a portion of the first dielectric layer, and the second hole exposes the portion of the first circuit layer. The second hole is disposed in the first hole. Then, a metal layer is formed to fill the trench and the second hole.