A wiring substrate includes an insulating layer, and a build-up part formed on the insulating layer and including an interlayer insulating layer and a conductor layer. The build-up part has a cavity penetrating through the build-up part such that the cavity is formed to accommodate an electronic component and has an inner wall and a bottom surface having a groove and that the groove is extending entirely in an outer edge part of the bottom surface and formed continuously from the inner wall surface of the cavity.

A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including first and second pads, a solder resist layer formed on the base layer, covering the conductor layer and having first opening exposing the first pad and second opening exposing the second pad, a first bump formed on the first pad and including a base plating layer and a top plating layer, and a second bump formed on the second conductor pad and including a base plating layer and a top plating layer. The second opening has diameter smaller than diameter of the first opening, the second bump has diameter smaller than diameter of the first bump, the first pad has a first recess formed on the first pad, the second pad has a second recess formed on the second pad, and the first recess is larger than the second recess.

A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including pads, a solder resist layer formed on the base layer such that the solder resist layer is covering the conductor layer and has openings exposing the pads, and plating bumps formed on the pads such that each plating bump includes a base plating layer formed in a respective one of the openings, an intermediate layer formed on the base plating layer, and a top plating layer formed on the intermediate layer. The plating bumps are formed such that the base plating layer has a side surface including a portion protruding from the solder resist layer, that the intermediate layer has a thickness in a range of 2.7 to 7.0 μm, and that the top plating layer has a hemispherical shape and is covering only an upper surface of the intermediate layer.

A sheet material includes a resin layer containing a binder and polypyrrole particles, an electroless plating film provided on the side of one main surface of the resin layer and including first electroless plating films and a second electroless plating film, and a transparent base material provided on the side of the other main surface of the resin layer.

A printed circuit board which improves the peel strength of a wiring pattern formed at a cavity bottom portion while enabling connection between an electronic component inside a cavity and a circuit outside the cavity to be performed at the cavity bottom portion, includes a cavity in a partial region of a multilayer substrate laminated with an insulating resin layer and an electrical conductor layer on a bottom layer of an insulating resin substrate. The cavity opens on a side of the insulating resin substrate, penetrates the insulating resin substrate, and includes a surface of the insulating resin layer as a bottom surface. The electrical conductor layer has a surface, the surface having a height equivalent to a height of the surface of the insulating resin layer and being embedded in the insulating resin layer in a manner to form a portion of the bottom surface.

A method for forming a metal film includes forming an oxide layer on a to-be-treated surface of a to-be-treated object by bringing the to-be-treated surface into contact with a reaction solution containing fluorine and an oxide precursor, removing fluorine in the oxide layer, supporting a catalyst on the oxide layer by bringing the oxide layer into contact with a catalyst solution, and depositing a metal film on the oxide layer by bringing the oxide layer into contact with an electroless plating liquid.

A coating agent for forming an oxide film; a method for producing an oxide film; and a method for producing a metal-plated structure, where the stability of the coating agent can be enhanced, and an oxide film which can be plated and has high adhesion to a substrate can be easily formed. The coating agent for forming an oxide film is a liquid coating agent, essentially contains titanium atoms, and optionally contains silicon atoms and copper atoms, wherein the ratio of the sum of the titanium atoms and copper atoms to the silicon atoms is 1:0-3:2. The method for producing an oxide film includes applying the coating agent to a substrate and heating to form an oxide film. The method for producing a metal-plated structure includes: a metal-film-forming step for forming a metal film on the oxide film; and a baking step for baking the metal film.

To improve, in an encapsulated circuit module having a metal shield layer covering a surface of a resin layer containing filler, a shielding property of the shield layer against electromagnetic waves.

The encapsulated circuit module has a substrate 100 on which electronic components are mounted, covered with a first resin 400. A surface of the first resin 400 is covered with a shield layer 600 including a first metal covering layer 610 made of copper or iron and a second metal covering layer 620 made of nickel. Each of the first metal covering layer 610 and the second metal covering layer 620 is thicker than 5 μm.

A novel method for the manufacturing of fine line circuitry on a transparent substrates is provided, the method comprises the following steps in the given order providing a transparent substrate, depositing a pattern of light-shielding activation layer on at least a portion of the front side of said substrate, placing a photosensitive composition on the front side of the substrate and on the pattern of light-shielding activation layer, photo-curing the photosensitive composition from the back side of the substrate with a source of electromagnetic radiation, removing any uncured remnants of the photosensitive composition; and thereby exposing recessed structures and deposition of at least one metal into the thus formed recessed structures whereby a transparent substrate with fine line circuitry thereon is formed. The method allows for very uniform and fine line circuitry with a line and space dimension of 0.5 to 10 μm.

A method for manufacturing a component carrier includes covering a dielectric layer structure by a metal foil, forming an electroless metal layer on the metal foil, and forming a multi-stage electroplating structure on the electroless metal layer. A component carrier made by the method is further described.