An electronic circuit board includes a printed circuit board and first and second electronic components. The printed circuit board includes a first insulating layer, a second insulating layer attached to the first insulating layer and in which is formed an open cavity, and a second conductive layer attached to the second insulating layer. The second conductive layer is treated to form a surface solder pad. The first electronic component is housed in the open cavity of the second insulating layer. The second electronic component is placed on the second insulating layer without overlapping with the open cavity. The first electronic component and the second electronic component each include a termination soldered on the surface solder pad, the surface solder pad being shared by the first and second electronic components.

Systems and methods for providing an electronics module including a raceway for mounting submodules and establishing electrical communication with said submodules. The raceway comprises a base structure and a conductive trace formed by a conductive plating process. Connection pads on the raceway are configured to receive connection nodes of the submodules for providing a continuous electrical connection between the raceway and the submodules for electrical communication and power transmission.

A printed circuit board includes a core layer having a first through-portion, a coil structure disposed in the first through-portion and comprising a support member, a first coil pattern in a planar spiral form disposed on one surface of the support member, and a body comprising a magnetic substance, wherein the support member and the first coil pattern are accommodated in the body, a first build-up layer covering at least a portion the core layer and disposed in at least a portion of the first through-portion, a first wiring layer disposed on one surface of the first build-up layer, and a first via layer passing through at least a portion of the first build-up layer and connected to the first wiring layer. The first via layer comprises a first wiring via connecting at least a portion of the first wiring layer to the first coil pattern.

At least one plating pen is brought into aligned relationship with at least one hole defined in a board. The pen includes a central retractable protrusion, a first shell surrounding the protrusion and defining a first annular channel therewith, and a second shell surrounding the first shell and defining a second annular channel therewith. The protrusion is lowered to block the hole and plating material is flowed down the first channel to a surface of the board and up into the second channel, to form an initial deposit on the board surface. The protrusion is raised to unblock the hole, and plating material is flowed down the first annular channel to side walls of the hole and up into the second annular channel, to deposit the material on the side walls of the hole.

A package substrate manufacturing method includes: providing a bearing plate, manufacturing a pattern and depositing metal to form the first circuit layer; manufacturing a pattern on the first circuit layer, depositing and etching metal to form a metal cavity, laminating a dielectric layer on the metal cavity, and performing thinning to expose the metal cavity; removing the bearing plate, etching the metal cavity to expose the cavity, depositing metal on the cavity and the dielectric layer, and performing pattern manufacturing and etching to form a second circuit layer; forming a first and second solder mask layers correspondingly on the first and second circuit layers, and performing pattern manufacturing on the first solder mask layer or the second solder mask layer to form a bonding pad; and cutting the cavity, the first circuit layer, the second circuit layer, the first solder mask layer and the second solder mask layer.

The present invention is directed to a composition for depositing a palladium coating on a substrate, in particular on a nickel-coated substrate, the composition comprising: (i) palladium ions, (ii) chloride ions, (iii) ethylenediamine (EDA), (iv) ethylenediamine disuccinate (EDDS), and (v) at least one reducing agent.

A wiring substrate includes an insulating substrate, a conductor and an Ni film. The insulating substrate has a first surface and a second surface on a side opposite the first surface, and contains AlN. The conductor is disposed on the first surface and contains Cu. The Ni film is disposed so as to extend across an upper surface and a side surface of the conductor to the first surface. Ti oxide is scattered so as to be at a plurality of points on the first surface.

A tin or tin alloy plating solution includes: (A) a soluble salt containing at least a stannous salt; (B) an acid selected from an organic acid and an inorganic acid or a salt thereof; (C) a phenyl-based surfactant formed of polyoxyethylene bisphenol ether represented by the General Formula (1); and (D) a leveling agent, ##STR00001##
here, in the Formula (1), X is C.sub.aH.sub.2a (a is 1 or 3) and m is 2 to 12.

A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.

A sensor package that is configured by molding a frame to a mounting substrate by insert molding and that prevents adhering to components and terminals and reduces damage to the mounting substrate. The sensor package includes an image sensor, a mounting substrate to which the image sensor is mounted, a frame provided in the mounting substrate so as to surround the image sensor, and a cover attached to the frame so as to cover the image sensor. The mounting substrate includes terminals electrically connected with the image sensor and a groove provided in a predetermined depth between an area in which the frame is provided and the terminals.