Patent classifications
H05K3/4084
Circuit board, circuit assembly, and circuit board manufacturing method
A circuit board that includes a substrate that has an upper surface on which a circuit pattern is formed, and a lower surface to which a plurality of bus bars that are spaced apart are fixed; a placement through hole that extends through the upper surface and the lower surface and faces a bus bar of the plurality of bus bars and in which an electronic component is placed; and a terminal conductor foil that protrudes inward into the placement through hole from the lower surface and to which a terminal of the electronic component is connected.
Method of producing an electrical through connection between opposite surfaces of a flexible substrate
A method of producing an electrical through connection. A cut extending from a first surface to a second surface and separating the area into a first part and a second part is provided on an area of the flexible substrate. At least one of the first and second part is raised from a first plane of the first surface. A first wet conductive layer is printed on the first surface on and around the cut. The first wet layer is solidified into a first dried conductive layer. At least one of the first part and the second part is raised from a second plane of the second surface. A second wet conductive layer is printed on the second surface on and around the cut. The second wet conductive layer is solidified into a second dried conductive layer, which creates an electrical through connection with the first dried conductive layer.
METHOD OF PRODUCING AN ELECTRICAL THROUGH CONNECTION BETWEEN OPPOSITE SURFACES OF A FLEXIBLE SUBSTRATE
A method of producing an electrical through connection. A cut extending from a first surface to a second surface and separating the area into a first part and a second part is provided on an area of the flexible substrate. At least one of the first and second part is raised from a first plane of the first surface. A first wet conductive layer is printed on the first surface on and around the cut. The first wet layer is solidified into a first dried conductive layer. At least one of the first part and the second part is raised from a second plane of the second surface. A second wet conductive layer is printed on the second surface on and around the cut. The second wet conductive layer is solidified into a second dried conductive layer, which creates an electrical through connection with the first dried conductive layer.
Method of Forming a Top Plane Connection in an Electro-Optic Device
An electrical connection between the backplane and the light-transmissive front electrode of an electro-optic display is provided by forming an aperture through the top front electrode coupled and a substrate coupled thereto and subsequently introducing a flowable, electrically-conductive material into the aperture. The flowable, electrically-conductive material provides an electrical contact between the light-transmissive electrically-conductive layer and the backplane.
Electro-optic display with measurement aperture
Electrical connection between the backplane and the front electrode of an electro-optic display is provided by forming a front plane laminate (100) comprising, in order, a light-transmissive electrically-conductive layer (104), a layer of electro-optic material (106), and a layer of lamination adhesive (108); forming an aperture (114) through all three layers of the front plane laminate (100); and introducing a flowable, electrically-conductive material (118) into the aperture (114), the flowable, electrically-conductive material being in electrical contact with the light-transmissive electrically-conductive layer (104) and extending through the adhesive layer (108).
Printed circuit board and corresponding method for producing a printed circuit board
The printed circuit board with at least one substrate layer having signal lines on a corresponding upper surface and on a corresponding lower surface has a sleeve-sized conductive layer on a circumference of at least one via hole between the upper and lower surface for a conductive connection between at least one signal line on the upper surface and at least one signal line on the lower surface. An axial enlargement of the sleeve-sized conductive layer is radially bent above a base layer of copper on the upper surface and below a base layer of copper on the lower surface.
CIRCUIT BOARD, CIRCUIT ASSEMBLY, AND CIRCUIT BOARD MANUFACTURING METHOD
A circuit board that includes a substrate that has an upper surface on which a circuit pattern is formed, and a lower surface to which a plurality of bus bars that are spaced apart are fixed; a placement through hole that extends through the upper surface and the lower surface and faces a bus bar of the plurality of bus bars and in which an electronic component is placed; and a terminal conductor foil that protrudes inward into the placement through hole from the lower surface and to which a terminal of the electronic component is connected.
IMPLEMENTING STUB-LESS PCB VIAS
A method and structure are provided for implementing stub-less printed circuit board (PCB) vias and custom interconnect through laser-excitation conductive track structures. Stub-less printed PCB vias are formed which terminate at desired signal layers by controlled laser excitation without stubs or the need to back-drill to remove such stubs.
Method for implementing stub-less printed circuit board vias
A method and structure are provided for implementing stub-less printed circuit board (PCB) vias and custom interconnect through laser-excitation conductive track structures. Stub-less printed PCB vias are formed which terminate at desired signal layers by controlled laser excitation without stubs or the need to back-drill to remove such stubs.
Method for manufacturing traces of PCB
A method for manufacturing traces of a printed circuit board (PCB) comprises an application of the periodic pulse reverse (PPR) pattern plating process. In the first stage, walls and bottoms in drilled holes of the PCB are modified with reduced graphene oxide (rGO) so that the vias can be formed by filling with copper and a very thin copper layer can be formed on the substrate through the electroplating process. In the second stage, a pattern of very fine traces with width/space less than 30/30 m is formed on the thin copper layer and then the traces are formed through the PPR pattern plating process. After removing unwanted copper layer, the traces with even thicknesses and square profiles are achieved and thus conform to requirements of the high density interconnection (HDI) technology.