Patent classifications
H05K3/423
Method for manufacturing transfer film including seed layer, method for manufacturing circuit board by selectively etching seed layer, and etching solution composite
The disclosure relates to a method for manufacturing a transfer film including an electrode layer, the method comprising: an electrode layer formation step of forming an electrode layer on a carrier member by using a conductive material; a placement step of placing the carrier member on at least one side of an insulating resin layer respectively; a bonding step of bonding the carrier member and the insulating resin layer together by applying pressure thereto; and a transfer step of removing the carrier member to transfer the electrode layer on the insulating resin layer.
Filling materials and methods of filling through holes of a substrate
Pastes are disclosed that are configured to coat a passage of a substrate. When the paste is sintered, the paste becomes electrically conductive so as to transmit electrical signals from a first end of the passage to a second end of the passage that is opposite the first end of the passage. The metallized paste contains a lead-free glass frit, and has a coefficient of thermal expansion sufficiently matched to the substrate so as to avoid cracking of the sintered paste, the substrate, or both, during sintering.
Plating method
Copper electroplating baths having a surface tension of ≦40 mN/m are suitable for filling vias with copper, where such copper deposits are substantially void-free and substantially free of surface defects.
SYSTEMS AND METHODS FOR ELECTROCHEMICAL PROCESS
The present disclosure is related to systems and methods for electrochemical process. The system may include a first electrode, a second electrode, an electric field distribution simulation optimizer, an electric field distribution controller, and a signal controller. The first electrode and the second electrode may form an electric field to change a substance on the second electrode. A morphology of the second electrode may be uneven. The first electrode may include an electrically conducting plate. A morphology of the electrically conducting plate may be in conformity with the morphology of the second electrode. A protruding portion of the electrically conducting plate may correspond to a recessing portion of the second electrode. A recessing portion of the electrically conducting plate may correspond to a protruding portion of the second electrode. The electric field distribution controller may be electrically connected to the signal controller and the electric field distribution simulation optimizer, respectively. The signal controller may be electrically connected to the electrically conducting plate. The signal controller may be configured to apply a processing signal to the electrically conducting plate.
CIRCUIT BOARD FOR TRANSMITTING HIGH-FREQUENCY SIGNAL AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing a circuit board circuit board for transmitting high-frequency signal, including: providing a first-line circuit board (20), a second circuit board (40), at least one third circuit board (50), a fourth circuit board (60), a fifth circuit board (61), and a sixth circuit board (62); stacking the first circuit board (20), the second circuit board (40), and third circuit board (50) in that order, and stacking the fourth circuit board (60), the sixth circuit board (62), and the fifth circuit board (61) on the third circuit board (50), and pressing them together to obtain the circuit board circuit board for transmitting high-frequency signal. The method manufacturing the circuit board circuit board for transmitting high-frequency signal can reduce a width of the transmission line. The present disclosure further provides the circuit board circuit board for transmitting high-frequency signal obtained by the above method.
Hermetic metallized via with improved reliability
According to various embodiments described herein, an article comprises a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and a via extending through the substrate from the first major surface to the second major surface over an axial length in an axial direction. The article further comprises a helium hermetic adhesion layer disposed on the interior surface; and a metal connector disposed within the via, wherein the metal connector is adhered to the helium hermetic adhesion layer. The metal connector coats the interior surface of the via along the axial length of the via to define a first cavity from the first major surface to a first cavity length, the metal connector comprising a coating thickness of less than 12 μm at the first major surface. Additionally, the metal connector coats the interior surface of the via along the axial length of the via to define a second cavity from the second major surface to a second cavity length, the metal connector comprising a coating thickness of less than 12 μm at the second major surface and fully fills the via between the first cavity and the second cavity.
PASSIVE THERMAL MANAGEMENT FOR SEMICONDUCTOR LASER BASED LIDAR TRANSMITTER
A laser package is mounted on the printed circuit board. At least one thermal via extends through the printed circuit board, coupled to the laser package. A thermal bridge is coupled to the at least one thermal via on the bottom of the printed circuit board. A thermal paste connects the thermal bridge to a conductive ground plane on the bottom of the printed circuit board, and to a mechanical housing.
DEVICES AND METHODS FOR FORMING ENGINEERED THERMAL PATHS OF PRINTED CIRCUIT BOARDS BY USE OF REMOVABLE LAYERS
A method for forming a thermal and electrical path in a PCB may include forming a first removable layer over a top surface of a PCB and a second removable layer over a bottom surface of the PCB. The method may also include milling or laser drilling the PCB from the top surface to form a first cavity extending into the PCB, plating the first side panel plating the first side with a second metal to partially fill the first cavity; and milling or laser drilling from the bottom surface to form a second cavity extending into the PCB, the first cavity in a thermal communication and/or an electrical communication with the second cavity. The method may also include panel plating the first side with a second metal to fill the first cavity and the second side with the second metal to fill the second cavity, and removing the first and second removable layers from the PCB to form the PCB with a thermal and/or an electrical path comprising the first cavity and the second cavity filled with the second metal.
PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF
A package substrate and a manufacturing method thereof are disclosed. The method includes: providing an inner substrate; processing an adhesive photosensitive material on a surface of a first side of the inner substrate to obtain an adhesive first insulating dielectric layer; mounting a component on the first insulating dielectric layer; and processing a photosensitive packaging material on the first side of the inner substrate to obtain a second insulating dielectric layer, where the second insulating dielectric layer covers the component.
PRINTED WIRING BOARD
A printed wiring board includes a first conductor layer, an insulating layer formed on the first conductor layer, a second conductor layer formed on the insulating layer, and a via conductor formed in the insulating layer such that the via conductor is connecting the first and second conductor layers. The insulating layer has opening exposing portion of the first conductor layer such that the via conductor is formed in the opening, the second conductor layer and via conductor are formed such that the second conductor layer and via conductor include a seed layer and an electrolytic plating layer on the seed layer, and the insulating layer includes resin and inorganic particles dispersed in the resin such that the particles include first particles forming inner wall surface in the opening and second particles embedded in the insulating layer and the first particles have shapes different from shapes of the second particles.