H05K3/429

SYSTEMS AND METHODS FOR PROVIDING AN INTERFACE ON A PRINTED CIRCUIT BOARD USING PIN SOLDER ENHANCEMENT

Systems and methods for applying solder to a pin. The methods comprising: disposing a given amount of solder on a non-wetable surface of a planar substrate; aligning the pin with the solder disposed on the non-wetable surface of the planar substrate; inserting the pin in the solder; and/or performing a reflow process to cause the solder to transfer from the planar substrate to the pin.

Machining Station and Method for Machining Workpieces
20230119865 · 2023-04-20 ·

The disclosure relates to a machining station for machining platelike workpieces (1) by means of at least one tool (10, 13, 14). The machining station has a measuring device (16) for acquiring data relating to the position of bores, a drill (10, 13, 14) for generating bores in the workpiece (1), and a data processor (17) for processing data of the at least one measuring device (16) and/or for controlling the at least one drill (10, 13, 14). The data processor (17) is here suitable and set up for performing an adjustment between a desired drilling position and/or a desired bore depth and an actual position and/or actual depth as determined by the at least one measuring device (16) for a bore present in the workpiece (1), and adapting the drilling position and/or bore depth for generating bores by means of the at least one drill (10, 13, 14).

Component Carrier With Partially Metallized Hole Using Anti-Plating Dielectric Structure and Electroless Plateable Separation Barriers
20230119480 · 2023-04-20 ·

A component carrier includes a stack with at least one electrically conductive layer structure, at least one electrically insulating layer structure, and a hole in the stack having a first hole portion covered with metal and having a second hole portion not covered with metal, wherein the second hole portion is defined by an anti-plating dielectric structure and an electroless plateable separation barrier.

Wafer level chip scale packaging intermediate structure apparatus and method

Presented herein is a WLCSP intermediate structure and method forming the same, the method comprising forming a first redistribution layer (RDL) on a carrier, the first RDL having mounting pads disposed on the first RDL, and mounting interposer dies on a second side of the first RDL. A second RDL is formed over a second side of the interposer dies, the second RDL having a first side adjacent to the interposer dies, one or more lands disposed on the second RDL, at least one of the one or more lands in electrical contact with at least one of the interposer dies or at least one of the mounting pads. A molding compound is formed around the interposer dies and over a portion of the first RDL prior to the forming the second RDL and the second RDL is formed over at least a portion of the molding compound.

FLEXIBLE CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

A flexible circuit board and a manufacturing method thereof are provided. The flexible circuit board includes a circuit structure, a first cover layer, and a second cover layer. The circuit structure has a top surface and a bottom surface opposite to the top surface. The circuit structure includes multiple circuit layers and multiple insulating layers stacked alternately. A material of the insulating layers is a photosensitive dielectric material and a Young's modulus of the insulating layers is between 0.36 GPa and 8 GPa. The first cover layer is disposed on the top surface of the circuit structure. The second cover layer is disposed on the bottom surface of the circuit structure.

COAXIAL VIA SHIELDED INTERPOSER
20230063808 · 2023-03-02 ·

A coaxial interposer may shield certain signals (e.g., noisy signals, high speed signals, radio frequency (RF) signals) transmitted through an electronic device. The coaxial interposer may include a coaxial via that includes an outer barrel of non-conductive material and an inner barrel of non-conductive material separated by a conductive barrel. Further, the outer barrel of non-conductive material may be enclosed by an outer metal coating. The coaxial via serves to internally shield each signals transmitted between layers of a printed circuit board (PCB) within the electronic device.

MATING BACKPLANE FOR HIGH SPEED, HIGH DENSITY ELECTRICAL CONNECTOR

A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.

SUBSTRATE AND SEMICONDUCTOR LASER
20230113274 · 2023-04-13 · ·

In one embodiment, the substrate is configured for a semiconductor laser diode and comprises a plurality of substrate layers. The substrate layers include insulating layers and carrier layers, which are thicker. A plurality of electrical contact surfaces, which are configured for the semiconductor laser diode, a laser capacitor and a control chip, are located on an assembling side of a first, uppermost substrate layer, which is an insulating layer. Electrical conductor tracks, which electrically interconnect the contact surfaces, are located on the one hand between the first insulating layer and a second insulating layer, and on the other hand between the second insulating layer and a third substrate layer, which is preferably an insulating layer.

Wired circuit board and imaging device

A method for producing a wired circuit board, the method including the steps of: a first step of providing an insulating layer having an opening penetrating in the thickness direction at one side surface in the thickness direction of the metal plate, a second step of providing a first barrier layer at one side surface in the thickness direction of the metal plate exposed from the opening by plating, a third step of providing a second barrier layer continuously at one side in the thickness direction of the first barrier layer and an inner surface of the insulating layer facing the opening, a fourth step of providing a conductor layer so as to contact the second barrier layer, and a fifth step of removing the metal plate by etching.

Systems and methods for providing an interface on a printed circuit board using pin solder enhancement

Systems and methods for applying solder to a pin. The methods comprising: disposing a given amount of solder on a non-wetable surface of a planar substrate; aligning the pin with the solder disposed on the non-wetable surface of the planar substrate; inserting the pin in the solder; and performing a reflow process to cause the solder to transfer from the planar substrate to the pin.