A technique for making a glass core substrate that is less prone to cracking. A core substrate of the present invention includes a glass plate and a first conductor pattern provided on a first main surface of the glass plate. The first conductor pattern includes a first nickel plating layer that is provided on the first main surface of the glass plate and has a phosphorus content of 5 mass % or less and a first copper plating layer that is provided on the first nickel plating layer.

An embedded chip package includes a circuit board, a chip, a dielectric material layer, and a build-up circuit structure. The circuit board includes a glass substrate and at least one conductive via. The glass substrate has a first surface, a second surface opposite the first surface, and a through-hole penetrating the glass substrate. The conductive via penetrates the glass substrate. The chip is disposed inside the through-hole. The dielectric material layer is filled inside the through-hole and covers the chip. The build-up circuit structure is disposed on the circuit board. The build-up circuit structure is electrically connected to the conductive via. A lower surface of the chip is exposed outside the dielectric material layer.

A wiring circuit substrate includes a glass base, insulating resin layers, wire groups, a first inorganic adhesive layer, a through electrode, and second conductive layers. The glass base has a through-hole. The insulating resin layers are laminated to the glass base and each have a conductive via formed therein. The wire groups are laminated to the insulating resin layers. The first inorganic adhesive layer is laminated to the inner surface of the through-hole. The through electrode is formed of a first conductive layer laminated to the first inorganic adhesive layer. The second conductive layers are formed on the through electrode and the glass base and electrically connected to the upper and lower ends of the through electrode. The glass base has a surface roughness Ra of 100 nm or less, and the second conductive layers each have an amount of dishing of 5 m or less above the through electrode.

An LC composite device includes a capacitor portion, an inductor portion, and a magnetic body portion. The capacitor portion is configured of a first substrate and a thin film capacitance element formed on the first substrate through a thin film process. The inductor portion is configured of a second substrate and a thin film inductance element formed on the second substrate through a thin film process. The magnetic body portion includes a magnetic substrate, and the capacitor portion. The inductor portion and the magnetic body portion are stacked in a positional relationship in which the magnetic body portion and the inductor portion are in contact with each other.

A substrate structure with high reflectance includes a base material, a patterned circuit layer, an insulating layer and a metal reflecting layer. The base material includes a first surface and a second surface opposite to the first surface. The patterned circuit layer is disposed on the first surface. The insulating layer covers the patterned circuit layer and a part of the first surface exposed by the patterned circuit layer. The metal reflecting layer covers the insulating layer, and a reflectance of the metal reflecting layer is substantially greater than or equal to 85%. A manufacturing method of a substrate structure with high reflectance is also provided.

A substrate structure with high reflectance includes a base material, a patterned circuit layer, an insulating layer and a metal reflecting layer. The base material includes a first surface and a second surface opposite to the first surface. The patterned circuit layer is disposed on the first surface. The insulating layer covers the patterned circuit layer and a part of the first surface exposed by the patterned circuit layer. The metal reflecting layer covers the insulating layer, and a reflectance of the metal reflecting layer is substantially greater than or equal to 85%. A manufacturing method of a substrate structure with high reflectance is also provided.

A substrate is disclosed. In an embodiment, a substrate includes a ceramic main body, an organic surface structure on at least one first outer face of the ceramic main body and outer redistribution layers integrated into the organic surface structure.

A wiring substrate includes a first insulating layer, an electronic component, a resin layer, a second insulating layer, a wiring pattern, and a via interconnect. The first insulating layer includes a cavity. The electronic component includes a first surface at which a pad is formed and a second surface facing away from the first surface and fixed in the cavity via an adhesive layer. The resin layer is on the first surface of the electronic component and covers the pad. The second insulating layer is on the first insulating layer and covers the resin layer. The wiring pattern is on the second insulating layer. The via interconnect pierces through the second insulating layer and the resin layer to electrically connect the wiring pattern to the pad.

A multilayer wiring board having a high degree of freedom of wiring design and realizing high-density wiring, and a method to simply manufacture the multilayer wiring board is provided. A core substrate with two or more wiring layers provided thereon through an electrical insulating layer. The core substrate has a plurality of throughholes filled with an electroconductive material, and the front side and back side of the core substrate have been electrically connected to each other by the electroconductive material. The throughholes have an opening diameter in the range of 10 to 100 m. An insulation layer and an electroconductive material diffusion barrier layer are also provided, and the electroconductive material is filled into the throughholes through the insulation layer. A first wiring layer provided through an electrical insulating layer on the core substrate is connected to the electroconductive material filled into the throughhole through via.

A glass core, a multilayer circuit board, and a method of manufacturing a glass core that appropriately form copper wiring, and suppresses crack and the like, a glass core includes: a glass plate; a first metal layer provided on the glass plate; a first electrolytic copper plating layer provided on the first metal layer; a dielectric layer provided above the first electrolytic copper plating layer; a second metal layer provided on the dielectric layer; an electroless nickel plating layer provided on the second metal layer and having a phosphorus content of less than 5 mass %; and a second electrolytic copper plating layer provided on the electroless nickel plating layer.