Patent classifications
H05K3/4614
Wiring substrate
A wiring substrate includes a first substrate and an electronic component mounted on an upper surface of the first substrate. A first pad is formed on an uppermost wiring layer of the first substrate. A connection terminal is formed on the electronic component and is located proximate to the first pad in a plan view. The wiring substrate further includes a connection member formed on the first pad to electrically connect the first pad and the connection terminal. The connection member includes a rod-shaped core and a solder layer, which is coated around the core and joined to the first pad. The solder layer includes a bulge that spreads from the core of the connection member in a planar direction. The bulge is joined to the connection terminal of the electronic component.
Filling materials and methods of filling through holes of a substrate
Pastes are disclosed that are configured to coat a passage of a substrate. When the paste is sintered, the paste becomes electrically conductive so as to transmit electrical signals from a first end of the passage to a second end of the passage that is opposite the first end of the passage. The metallized paste contains a lead-free glass frit, and has a coefficient of thermal expansion sufficiently matched to the substrate so as to avoid cracking of the sintered paste, the substrate, or both, during sintering.
Electronic part embedded substrate and method of producing an electronic part embedded substrate
An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.
MULTILAYER RESIN SUBSTRATE AND METHOD OF MANUFACTURING MULTILAYER RESIN SUBSTRATE
A multilayer resin substrate includes a stacked body including resin layers stacked on each other, a first planar conductor on a resin layer, and an interlayer connection conductor on a resin layer. The interlayer connection conductor includes a first interlayer connection conductor connected to an external conductor, and a second interlayer connection conductor bonded to the first interlayer connection conductor and a planar conductor. The first and second interlayer connection conductors are made of different materials. The second interlayer connection conductor includes a constricted portion including a smaller planar cross-sectional area than a different portion, between a bonding portion to which the first interlayer connection conductor is bonded and a bonding portion to which the planar conductor is bonded.
CIRCUIT BOARD AND METHOD OF MANUFACTURING CIRCUIT BOARD, AND METHOD OF MANUFACTURING CIRCUIT BOARD ASSEMBLY
A circuit board includes first circuit substrate and second circuit substrate; first circuit substrate includes: a first base layer arranged on the first circuit layer and a plurality of first conductive bodies on the substrate layer; the first circuit layer includes a hot pressing area and a non-hot pressing area except the hot pressing area. One end of the first conductive body is electrically connected to the hot pressing area and the other end is exposed to the first base layer; second circuit substrate includes: a second base layer, a second base layer arranged on the second circuit layer and a plurality of second conductive bodies; one end of the second conductive body is electrically connected to the second circuit layer, and the other end is exposed on the second base layer; The body is electrically connected to the second conductive body.
CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF AND ELECTRONIC DEVICE
A circuit board includes a first external circuit layer, a first substrate, a second substrate, a third substrate, and a conductive through hole structure. The first substrate includes conductive pillars electrically connecting the first external circuit layer and the second substrate. The second substrate has an opening and includes a first dielectric layer. The opening penetrates the second substrate, and the first dielectric layer fills the opening. The third substrate includes an insulating layer, a second external circuit layer, and conductive holes. A conductive material layer of the conductive through hole structure covers an inner wall of a through hole and electrically connects the first and the second external circuit layers to define a signal path. The first external circuit layer, the conductive pillars, the second substrate, the conductive holes and the second external circuit layer are electrically connected to define a ground path surrounding the signal path.
Circuit board and manufacturing method thereof
The disclosure provides a method for manufacturing a circuit board, which includes: (1) providing a substrate, forming a through hole in the substrate; (2) filling the through hole with a conductor to form a conductive hole; (3) providing a peelable film to cover the substrate; (4) forming a groove by laser, the groove including a concave portion; (5) performing a surface treatment on a wall of the groove; (6) removing the peelable film; (7) forming a seed layer; (8) making a circuit layer to obtain a circuit board unit, the circuit layer including a connection pad, the connection pad shaped as a conductive protrusion which surrounds and is electrically connected to the conductor; (9) repeating step (1) to step (8) at least once; and (10) laminating the circuit board units. The disclosure also provides a circuit board.
Hybrid dielectric scheme in packages
A method includes forming a first redistribution line, forming a polymer layer including a first portion encircling the first redistribution line and a second portion overlapping the first redistribution line, forming a pair of differential transmission lines over and contacting the polymer layer, and molding the pair of differential transmission lines in a molding compound. The molding compound includes a first portion encircling the pair of differential transmission lines, and a second portion overlapping the pair of differential transmission lines. An electrical connector is formed over and electrically coupling to the pair of differential transmission lines.
MICROELECTRONIC ARRANGEMENT AND METHOD FOR MANUFACTURING THE SAME
Embodiments provide a method for manufacturing a microelectronic arrangement. The method includes a step of providing a chip-film module with a semiconductor chip and a film substrate having arranged thereon the semiconductor chip, wherein the chip-film module includes at least one coupling element spaced apart from the semiconductor chip and electrically coupled to at least one terminal of the semiconductor chip. Furthermore, the method includes a step of embedding the chip-film module into a printed circuit board, wherein, in embedding the chip-film module into the printed circuit board, the at least one coupling element of the chip-film module is coupled vertically [e.g. in the vertical direction [e.g. in relation to the printed circuit board]] [e.g. perpendicular to a surface of the printed circuit board] to at least one coupling counter element of the printed circuit board
3D PACKAGE CONFIGURATION
A novel 3D package configuration is provided by stacking a folded flexible circuit board structure on a package substrate and electrically connected therewith based on the foldable characteristics of the flexible circuit board, and the high temperature resistance of the flexible circuit board which is suitable for insulating layer process, metal layer process, photolithography process, etching and development process, to make conventional semiconductor dies of various functions be bonded on one die and/or two side of a flexible circuit board and electrically connected therewith in advance.