Patent classifications
H05K3/4652
BOARD-TO-BOARD CONNECTING STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A board-to-board connecting structure which adds no significant thickness to a single printed circuit board includes a first circuit board and a second circuit board. The first circuit board includes first circuit substrate, adhesive layer, and second circuit substrate. The first circuit substrate includes first base layer, first inner wiring layer with first pad, and first outer wiring layer defining a receiving space. The second circuit substrate includes insulating layer and two second outer wiring layers. A conductive via in the second circuit substrate connects the two second outer wiring layers. The second circuit board includes second base layer and also two third outer wiring layers each with a second pad. The second circuit board is laterally disposed in the receiving space and one second pad connects to the conductive via and the other to the first pad.
Copper Foil, Copper Foil for High-Frequency Circuit, Carrier-Attached Copper Foil, Carrier-Attached Copper Foil for High-Frequency Circuit, Laminate, Method of Manufacturing Printed Wiring Board, and Method of Manufacturing Electronic Device
To provide a copper foil that the transmission loss is favorably controlled even when the copper foil is used in a high-frequency circuit board and that adhesion to a resin is favorable.
A copper foil including a roughened layer, and the roughened layer includes a primary particle layer, a surface roughness Ra of a surface on the side of the primary particle layer is 0.12 μm or less, and the average particle size of primary particles of the primary particle layer is 0.10 to 0.25 μm.
Method for manufacturing device embedded substrate, and device embedded substrate
In a method for manufacturing a device embedded substrate, a conductive via that penetrates a first insulating layer and a second insulating layer from an outer metal layer to reach a second terminal of an IC device is formed after forming the outer metal layer.
Embedding Component in Component Carrier by Component Fixation Structure
A method of manufacturing a component carrier, includes providing a base structure having a main surface that is at least partially covered by a component fixation structure; providing a component, the component intrinsically comprising warpage; mounting the component on a surface provided on a plate structure and/or on the base structure to remove the warpage of the component at least partially; and fixating the component to the component carrier through the component fixation structure.
MULTILAYER FLEXIBLE PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME
[Problem to be Solved]
A multilayer flexible printed circuit board having a strip line advantageous to folding is provided.
[Solution]
A multilayer flexible printed circuit board 100 of an embodiment is a multilayer flexible printed circuit board having a strip line foldable at a folding part F1, the board including: a flexible insulative substrate 30; an inner layer circuit pattern 5 provided inside the flexible insulative substrate 30 and including a signal line 6 extending in a predetermined direction; a ground thin film 14a constituting a ground layer at least in the folding part F1 out of a ground layer of the strip line and constituted of a nonelectrolytic plating coat 14 formed on the flexible insulative substrate 30; and a protective layer 20 that covers the ground thin film 14a and is in close contact with an exposed part 19 from which the flexible insulative substrate 30 is exposed.
LASER DIODE CHIP ON PRINTED CIRCUIT BOARD
A light source module comprising a semiconductor light source mounted directly to a conducting trace of a multilayer printed circuit board having a core comprising a plurality of core layers electrically and thermally coupled by a plurality of buried vias wherein at least one of the core layers comprises a heat sink plane.
Active chip package substrate and method for preparing the same
An active chip package substrate and a method for preparing the same. The active chip package substrate includes: a core board; at least one upper active chip, embedded in the core board and having an active surface facing toward a lower surface of the core board, the upper active chip being an active bare chip; and at least one lower active chip, embedded in the core board and having an active surface facing toward an upper surface of the core board, the lower active chip being an active bare chip.
Method for manufacturing transfer film including seed layer, method for manufacturing circuit board by selectively etching seed layer, and etching solution composite
The disclosure relates to a method for manufacturing a transfer film including an electrode layer, the method comprising: an electrode layer formation step of forming an electrode layer on a carrier member by using a conductive material; a placement step of placing the carrier member on at least one side of an insulating resin layer respectively; a bonding step of bonding the carrier member and the insulating resin layer together by applying pressure thereto; and a transfer step of removing the carrier member to transfer the electrode layer on the insulating resin layer.
Film composite having electrical functionality for applying to a substrate
A film composite with electrical functionality for application on a substrate includes at least one conductive structure, a first bonding coat, a film layer and a second bonding coat. The first bonding coat is disposed on an underside of the at least one conductive structure, wherein the first bonding coat has an adhesive effect for application of the at least one conductive structure on the substrate. The second bonding coat is disposed between an upper side of the at least one conductive structure and the film layer. The second bonding coat has an adhesive effect, by which the film layer adheres to the at least one conductive structure.
Wiring substrate and method for manufacturing the same
A wiring substrate includes a core substrate, and a build-up layer including conductor layers and insulating layers alternately laminated on the substrate and via conductors formed in the insulating layers, each insulating layer having a coating layer and a support layer stacked on the coating layer such that the support layer has surface on which a conductor layer is laminated and the coating layer is covering a conductor layer, each via conductor connecting two conductor layers through an insulating layer. The coating layer has a thickness greater than that of the support layer and includes inorganic filler at content rate of 65 to 85% by mass, and the support layer includes inorganic filler at different content rate such that thermal expansion coefficient of the coating layer is smaller than that of the support layer and the coefficients of the coating and support layers have difference of 30 ppm/° C. or less.