A chip package is provided. The chip package includes a semiconductor chip and a semiconductor die over the semiconductor chip. The chip package also includes a dielectric layer over the semiconductor chip and encapsulating the semiconductor die, and the dielectric layer is substantially made of a semiconductor oxide material. The chip package further includes a conductive feature penetrating through a semiconductor substrate of the semiconductor die and physically connecting a conductive pad of the semiconductor chip.

A chip package is provided. The chip package includes a semiconductor chip and a semiconductor die over the semiconductor chip. The chip package also includes a dielectric layer over the semiconductor chip and encapsulating the semiconductor die, and the dielectric layer is substantially made of a semiconductor oxide material. The chip package further includes a conductive feature penetrating through a semiconductor substrate of the semiconductor die and physically connecting a conductive pad of the semiconductor chip.

A circuit board includes a substrate, a first circuit layer, a second circuit layer, and a third circuit layer. The substrate includes a base layer, a first metal layer formed on the base layer, and a seed layer formed on the first metal layer. The first circuit layer is located on the substrate and includes the first metal layer and a signal layer formed on a surface of the first metal layer. The second circuit layer is coupled to the first circuit layer and includes the first metal layer, the seed layer, and a connection pillar formed on a surface of the first metal layer and the seed layer. The third circuit layer is coupled to the second circuit layer and includes the seed layer and a coil formed on a surface of the seed layer.

A method of the invention is a method of processing a wiring substrate that includes a configuration in which conductors locally disposed on a substrate are coated with resin having inorganic members that form a filler and are dispersed in an organic member, the method including: removing the organic member from a surface layer side of the resin by use of an ashing method; and removing, by use of a wet cleaning method, the inorganic members remaining the surface layer side of the resin from which the organic member is removed.

Embodiments that allow multi-chip interconnect using organic bridges are described. In some embodiments an organic package substrate has an embedded organic bridge. The organic bridge can have interconnect structures that allow attachment of die to be interconnected by the organic bridge. In some embodiments, the organic bridge comprises a metal routing layer, a metal pad layer and interleaved organic polymer dielectric layers but without a substrate layer. Embodiments having only a few layers may be embedded into the top layer or top few layers of the organic package substrate. Methods of manufacture are also described.

[Object] Provided are an electrode substrate film in which a circuit pattern formed of a metal thin line is less visible even under highly bright illumination, and a laminate film applied to the same. [Solving Means] An electrode substrate film with a transparent substrate 52 and a metal laminate thin line includes a metal absorption layer 51 with a film thickness of 20 nm to 30 nm inclusive as a first layer, and a metal layer 50 as a second layer, counted from the transparent substrate side, the laminate thin line having a line width of 20 m or less. Optical constants of the metal absorption layer in a visible wavelength range (400 to 780 nm) satisfy conditions that a refractive index is 2.0 to 2.2 and an extinction coefficient is 1.8 to 2.1 at a wavelength of 400 nm, the refractive index is 2.4 to 2.7 and the extinction coefficient is 1.9 to 2.3 at a wavelength of 500 nm, the refractive index is 2.8 to 3.2 and the extinction coefficient is 1.9 to 2.5 at a wavelength of 600 nm, the refractive index is 3.2 to 3.6 and the extinction coefficient is 1.7 to 2.5 at a wavelength of 700 nm, and the refractive index is 3.5 to 3.8 and the extinction coefficient is 1.5 to 2.4 at a wavelength of 780 nm. An average reflectance in the visible wavelength range attributed to reflection at an interface between the transparent substrate and the metal absorption layer is 20% or less, and a difference between a highest reflectance and a lowest reflectance in the visible wavelength range is 10% or less.

[Object] Provided are a laminate film and an electrode substrate film with excellent etching quality, in which a circuit pattern formed by etching processing is less visible under highly bright illumination, and a method of manufacturing the same. [Solving Means] A laminate film includes a transparent substrate 60 formed of a resin film and a layered film provided on at least one surface of the transparent substrate. The layered film includes metal absorption layers 61 and 63 as a first layer and metal layers (62, 65), (64, 66) as a second layer, counted from the transparent substrate side. The metal absorption layers are formed by a reactive sputtering method which uses a metal target made of Ni alone or an alloy containing two or more elements selected from Ni, Ti, Al, V, W, Ta, Si, Cr, Ag, Mo, and Cu, and a reactive gas containing oxygen. The reactive gas contains hydrogen.

Methods and structures corresponding to superconducting apparatus including superconducting layers and traces are provided. A method for forming a superconducting apparatus includes forming a first dielectric layer on a substrate by depositing a first dielectric material on the substrate and curing the first dielectric material at a first temperature. The method further includes forming a first superconducting layer comprising a first set of patterned superconducting traces on the first dielectric layer. The method further includes forming a second dielectric layer on the first superconducting layer by depositing a second dielectric material on the first superconducting layer and curing the second dielectric material at a second temperature, where the second temperature is lower than the first temperature. The method further includes forming a second superconducting layer comprising a second set of patterned superconducting traces on the second dielectric layer.

Embodiments that allow multi-chip interconnect using organic bridges are described. In some embodiments an organic package substrate has an embedded organic bridge. The organic bridge can have interconnect structures that allow attachment of die to be interconnected by the organic bridge. In some embodiments, the organic bridge comprises a metal routing layer, a metal pad layer and interleaved organic polymer dielectric layers but without a substrate layer. Embodiments having only a few layers may be embedded into the top layer or top few layers of the organic package substrate. Methods of manufacture are also described.

A printed wiring board includes a multilayer body, a first wiring layer formed on first surface of the body and including first pads, a second wiring layer embedded into second surface of the body and including second and third pads, conductor posts formed on the third pads, and via conductors formed in the body and having diameter reducing toward the second surface of the body. Each third pad has metal foil formed thereon such that each post is formed on the foil, the second wiring layer is formed such that the second pads are positioned to connect an electronic component in central portion of the second surface of the body and the third pads are positioned to connect another board in outer edge portion of the second surface of the body, and the second pads are formed such that each second pad has exposed surface recessed from the second surface.