Provided is a method of manufacturing a printed circuit nano-fiber web. A method of manufacturing a printed circuit nano-fiber web according to an embodiment of the present invention includes (1) a step of electrospinning a spinning solution including a fiber-forming ingredient to manufacture a nano-fiber web; and (2) a step of forming a circuit pattern to coat an outer surface of nano-fiber included in a predetermined region on the nano-fiber web using an electroless plating method. According to the present invention, a circuit pattern-printed nano-fiber web having flexibility and resilience suitable for future smart devices may be realized. In addition, a circuit pattern may be densely formed to a uniform thickness on a flexible nano-fiber web using an electroless plating method, and the flexible nano-fiber web may include a plurality of pores. Accordingly, since the printed circuit nano-fiber web may satisfy waterproofness and air permeability characteristics, it can be used in various future industrial fields including medical devices, such as biopatches, and an electronic device, such as smart devices.

A method of fabricating a wearable device having one or more integrated electronic components, including providing a substrate having an elastomeric material, at least one metal additive, and/or a carbon source additive; forming electrical circuitry within the elastomeric material by structuring one or more electrically conductive traces and plating the one or more electrically conductive traces; and providing the electrical circuitry with a sensor, wherein the sensor is configured to come in direct contact with skin of an individual.

In a method for preparing a printed circuit board assembly (PCBA), the PCBA has a base circuit board having a plurality of electronic components installed thereon. First, the surface of the PCBA is cleaned with a cleaner. After cleaning, the staking material is applied around the plurality of electronic components around the circumference of the plurality of electronic components. After applying the staking material, the PCBA with the staking material is cured and inspected.

Package assemblies including a die stack and related methods of use. The package assembly includes a substrate with a first surface, a second surface, and a third surface bordering a through-hole extending from the first surface to the second surface. The assembly further includes a die stack, a conductive layer, and a lid. The die stack includes a chip positioned inside the through-hole in the substrate. A section of the conductive layer is disposed on the third surface of the substrate. A portion of the lid is disposed between the first chip and the section of the conductive layer. The conductive layer is configured to be coupled with power, and the lid is configured to be coupled with ground. The portion of the lid may act as a first plate of a capacitor, and the section of the conductive layer may act as a second plate of the capacitor.

A stacked structure includes a circuit board, an electronic component, metallic cores, and insulating cladding layers. The circuit board includes first bonding pads. The electronic component includes second bonding pads that are opposite to the first bonding pads. Each metallic core is connected to a corresponding first bonding pad and a corresponding second bonding pad. The metallic cores have a curved surface interposed between the corresponding first bonding pad and the corresponding second bonding pad. The insulating cladding layers are separated from each other and cover the curved surfaces of the metallic cores.

A ceramic and polymer composite including: a first continuous phase comprising a sintered porous ceramic having a solid volume of from 50 to 85 vol % and a porosity or a porous void space of from 50 to 15 vol %, based on the total volume of the composite; and a second continuous polymer phase situated in the porous void space of the sintered porous ceramic. Also disclosed is a composite article, a method of making the composite, and a method of using the composite.

To provide a circuit board in which a curvature of a display surface can be controlled, or to provide a highly portable circuit board. A circuit board includes a substrate with flexibility and a curvature control mechanism. The curvature control mechanism includes a first electromagnet and a second electromagnet provided over a first surface of the substrate, an insulating film provided over the first and second electromagnets, and wirings electrically connected to the first and second electromagnets.

Package assemblies including a die stack and related methods of use. The package assembly includes a substrate with a first surface, a second surface, and a third surface bordering a through-hole extending from the first surface to the second surface. The assembly further includes a die stack, a conductive layer, and a lid. The die stack includes a chip positioned inside the through-hole in the substrate. A section of the conductive layer is disposed on the third surface of the substrate. A portion of the lid is disposed between the first chip and the section of the conductive layer. The conductive layer is configured to be coupled with power, and the lid is configured to be coupled with ground. The portion of the lid may act as a first plate of a capacitor, and the section of the conductive layer may act as a second plate of the capacitor.

A power-module substrate and a heat sink made of an aluminum-impregnated silicon carbide formed by impregnating aluminum in a porous body made of silicon carbide; where yield strength of a circuit layer is 1 (MPa), a thickness of the circuit layer is t1 (mm), a bonding area of the circuit layer and a ceramic board is A1 (mm.sup.2), yield strength of a metal layer is 2 (MPa), a thickness of the metal layer is t2 (mm), a bonding area of the metal layer and the ceramic board is A2 (mm.sup.2); the thickness t1 is formed to be between 0.1 mm and 3.0 mm (inclusive); the thickness t2 is formed to be between 0.15 mm and 5.0 mm (inclusive); the thickness t2 is formed larger than the thickness t1; and a ratio {(2t2A2)/(1t1A1)} is in a range between 1.5 and 15 (inclusive).

A porous polyimide shaped article has a thickness in a range from 550 m to 3,000 m and has a relative dielectric constant of 1.8 or less and a dielectric loss tangent of 0.01 or less at 1 MHz. The porous polyimide shaped article satisfies the following formula:
1.2A1.6
wherein A represents a square root of a ratio of a pore size D.sub.84 where a cumulative percentage by number of pores from smaller sizes is 84% to a pore size D.sub.16 where the cumulative percentage by number of the pores from smaller sizes is 16% ((D.sub.84/D.sub.16).sup.1/2) in a pore size distribution measured by mercury intrusion porosimetry.