A layout routing structure and a layout routing method for improving an SI performance of a signal are provided. Each of two positive and negative differential traces on a PCB includes multiple segments D1, multiple segments D2 and multiple segments D3. In each of the two differential traces, the segment D1 and the segment D2 are staggered and parallel to each other, the segment D2 is routed between any two segments D1, and any two adjacent segments D1 and D2 are connected by the segment D3. In one of the two differential traces, all of the segments D1 are routed on the glass cloth, and all of the segments D2 are routed on the epoxy resin. In the other of the two differential traces, all of the segments D1 are routed on the epoxy resin, and all of the segments D2 are routed on the glass cloth.

A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulting layer on the opposite side, and interlayer connection conductors formed in the through holes through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the though holes include first and second groups of through holes and that the through holes in the second group have inner walls covered with non-conductive resin, and the interlayer conductors includes first interlayer conductors each including a plating film formed in the first group of through holes, and second interlayer conductors each including a plating film formed in the second group of through holes such that minimum distance between the second interlayer conductors is smaller than minimum distance between the first interlayer conductors.

The present disclosure provides a novel glass composition that has a low permittivity and is suitable for mass production. A glass composition provided satisfies, in wt %, for example, 40≤SiO.sub.2≤60, 25≤B.sub.2O.sub.3≤45, 0<Al.sub.2O.sub.3≤18, 0<R.sub.2O≤5, and 0≤RO≤12, and satisfies at least one of: i) SiO.sub.2+B.sub.2O.sub.3≥80 and SiO.sub.2+B.sub.2O.sub.3+Al.sub.2O.sub.3≤99.9; and ii) SiO.sub.2+B.sub.2O.sub.3≥78, SiO.sub.2+B.sub.2O.sub.3+Al.sub.2O.sub.3≤99.9, and 0<RO<10. Another glass composition provided includes SiO.sub.2, B.sub.2O.sub.3, Al.sub.2O.sub.3, R.sub.2O, and 3<RO<8 at the same contents as the above, and satisfies SiO.sub.2+B.sub.2O.sub.3≥75 and SiO.sub.2+B.sub.2O.sub.3+Al.sub.2O.sub.3<97, where R.sub.2O=Li.sub.2O+Na.sub.2O+K.sub.2O and RO=MgO+CaO+SrO.

A wiring board includes a first wiring layer formed on one surface of a core layer, a first insulating layer formed on the one surface of the core layer so as to cover the first wiring layer, a via wiring embedded in the first insulating layer, a second wiring layer formed on a first surface of the first insulating layer, and a second insulating layer thinner than the first insulating layer formed on the first surface of the first insulating layer so as to cover the second wiring layer. The first wiring layer comprises a pad and a plane layer provided around the pad. One end surface of the via wiring is exposed from the first surface of the first insulating layer and directly bonded to the second wiring layer. The other end surface of the via wiring is directly bonded to the pad in the first insulating layer.

A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulting layer on the opposite side, and interlayer connection conductors formed in the through holes through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the though holes include first and second groups of through holes and that the through holes in the second group have inner walls covered with non-conductive resin, and the interlayer conductors includes first interlayer conductors each including a plating film formed in the first group of through holes, and second interlayer conductors each including a plating film formed in the second group of through holes such that minimum distance between the second interlayer conductors is smaller than minimum distance between the first interlayer conductors.

One manner of producing more desirable clothing with electronic capabilities is to manufacture electronics, such as the charging wires or devices themselves, directly onto the textile materials. Textile materials generally do not support the manufacturing of electronic devices, in part because the surface of the textile is too rough for electronic devices or the processes used to manufacture electronic devices. An intermediate layer may be placed on the textile material to reduce the roughness of the surface of the textile material and provide other beneficial characteristics for the placement of electronic devices directly on the textile material.

A wiring board includes a first wiring layer formed on one surface of a core layer, a first insulating layer formed on the one surface of the core layer so as to cover the first wiring layer, a via wiring embedded in the first insulating layer, a second wiring layer formed on a first surface of the first insulating layer, and a second insulating layer thinner than the first insulating layer formed on the first surface of the first insulating layer so as to cover the second wiring layer. The first wiring layer comprises a pad and a plane layer provided around the pad. One end surface of the via wiring is exposed from the first surface of the first insulating layer and directly bonded to the second wiring layer. The other end surface of the via wiring is directly bonded to the pad in the first insulating layer.

An electrical circuit board includes a first conductive layer and a second conductive layer. And an interlayer forming a thermal barrier is placed between the first conductive layer and the second conductive layer, wherein the thermal barrier reduces heat transfer between the first conductive layer and the second conductive layer.

A printed circuit board includes a spread weave of fibers having a first direction and a second direction with corresponding fibers spread more in the first direction than the second direction; and one or more pairs of traces on the spread weave of fibers, wherein the first direction has less differences in dielectric permittivity seen by each trace than the second direction, wherein the one or more pairs of traces are routed according to a routing design that includes one or more fixed regions on the spread weave of fibers, where routing of traces therein is restricted to linear, non-angled routed in the first direction.

A fluorocarbon resin composition is applicable to produce a prepreg for use in making a high-frequency circuit board, including a polytetrafluoroethylene resin; a fluorine-containing copolymer of poly fluoroalkoxy or fluorinated ethylene propylene; inorganic powders and an impregnation additive such as hydroxyethyl cellulose; resulted in that the prepreg is capable of increasing a plurality of times for proceeding impregnation-coating, the surface defects prone to occur on a fluorocarbon prepreg during drying, baking and sintering after impregnation are therefore improved at the same time.