Patent classifications
H05K2201/09154
POWER SUPPLY MODULE USED IN A SMART TERMINAL AND POWER SUPPLY MODULE ASSEMBLY STRUCTURE
The present disclosure provides a power supply module used in a smart terminal and a power supply module assembly structure, the power supply module includes a substrate having first and second surfaces opposite to each other; a power passive element, an active element and a plurality of first conductive parts disposed at the substrate; the power passive element being independently disposed on the first surface of the substrate as a whole; wherein a maximum height of the power passive element disposed on the first surface of the substrate is greater than a sum of a maximum height of an element disposed on the second surface of the substrate and an half of the thickness of the substrate.
Printed circuit board
A printed circuit board comprises a board main body, a sensor, an external connection pad, and a hollow-structured electrical conductor. The board main body has a top face and a bottom face opposite the top face. The sensor is mounted on one of the top face and the bottom face of the board main body. The external connection pad is provided on the top face or the bottom face of the board main body opposite the sensor. The hollow-structured electrical conductor extends through the board main body and electrically connects the sensor to the external connection pad.
Printed circuit board and method of manufacturing the same
A printed circuit board includes an insulating layer, a pad, and a via fill. The insulating layer includes a via hole. The pad is formed in the insulating layer such that an intermediate portion thereof is exposed by the via hole. The pad includes a through hole formed in the intermediate portion. The via fill is formed in the via hole, configured to fill the through hole, and coupled to the intermediate portion.
Insulated heat dissipation substrate
An insulated heat dissipation substrate including: a ceramic substrate; and a conductor layer bonded onto at least one of main surfaces of the ceramic substrate, wherein the conductor layer includes: an upper surface; a lower surface; and a side surface 1 connecting the upper surface with the lower surface; the ceramic substrate includes: a lowest portion; a side surface 2 connecting the lowest portion with the side surface 1 of the conductor layer; and a bonding surface at a position higher than the lowest portion, the bonding surface being bonded to the lower surface of the conductor layer; an absolute value (||) is 20 or less on average; and the side surface 1 has a receding portion from an end of the upper surface in the normal direction relative to the tangential line of the contour of the conductor layer as viewed in plane.
DISPLAY PANEL AND MANUFACTURING METHOD THEREOF
The present invention provides a display panel and a manufacturing method thereof. The display panel comprises an array substrate provided with a first inclined plane at an edge of one side of the array substrate; a color filter substrate disposed on one side surface of the array substrate; the color filter substrate provided with a second inclined plane at an edge of one side of the color filter substrate, and the second inclined plane on a same plane with the first inclined plane; and a chip on film bonded to the first inclined plane and the second inclined plane. A manufacturing method of the display panel comprises an array substrate providing step, a color filter substrate disposing step, a cutting step and a bonding step. The technical effect of the present invention is reducing the thickness of the bottom frame of the display panel and increasing the screen ratio.
Anisotropic Etching Using Photopolymerizable Compound
A method of etching an electrically conductive layer structure during manufacturing a component carrier is provided. The method includes carrying out a first etching of at least one exposed region of an electrically conductive layer structure by a first etching composition having a photo-hardenable compound to thereby form a recess in the electrically conductive layer structure, hardening the photo-hardenable compound by irradiation with photons selectively on an upper side wall portion of the recess to thereby cover the upper side wall portion with a photo-hardened compound, carrying out a second etching by a second etching composition selectively on a side wall portion and/or bottom portion of the recess being not covered with the photo-hardened compound, and subsequently removing the photo-hardened compound from the side wall portion. In addition, a component carrier is provided.
Printed wiring board
A printed wiring board used to suppress parasitic component is provided. The printed wiring board 100 includes a multi-layer substrate 110, and a power line 50 laid on the multi-layer substrate 110 and connected with a power terminal row T11a-T11d of a semiconductor device 10. The power line 50 includes a first wiring pattern 51 formed on a surface of the multi-layer substrate 110, a second wiring pattern 52 formed within the multi-layer substrate 110, and interlayer connections 53x and 53y electrically conducting the first wiring pattern 51 and the second wiring pattern 52 to bypass at least a portion of the power terminal row T11a-T11d.
Power supply module used in a smart terminal and power supply module assembly structure
The present disclosure provides a power supply module used in a smart terminal and a power supply module assembly structure, the power supply module includes a substrate having first and second surfaces opposite to each other; a power passive element, an active element and a plurality of first conductive parts disposed at the substrate; the power passive element being independently disposed on the first surface of the substrate as a whole; wherein a maximum height of the power passive element disposed on the first surface of the substrate is greater than a sum of a maximum height of an element disposed on the second surface of the substrate and an half of the thickness of the substrate.
SEMICONDUCTOR PACKAGE WITH GUIDE PIN
A semiconductor guide pin is disclosed. Specific implementations may include a heatsink, one or more substrates coupled together, one or more pressfit pins coupled to the one or more substrates, and two or more guide pins coupled to the one or more substrates, where the two or more guide pins may have a height greater than the one or more pressfit pins.
THROUGH-HOLE ELECTRODE SUBSTRATE
A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a second surface, an area of the second aperture being larger than that of the first aperture, the through-hole having a minimum aperture part between the first aperture and the second aperture, wherein an area of the minimum aperture part in a planer view is smallest among a plurality of areas of the through-hole in a planer view, a filler arranged within the through-hole, and at least one gas discharge member contacting the filler exposed to one of the first surface and the second surface.