Devices and methods related to metallization of ceramic substrates for shielding applications. In some embodiments, a method for fabricating a ceramic device can include forming a plurality of conductive features on or through a selected layer along a boundary between a first region and a second region, each conductive feature extending into the first region and the second region. The method can also include forming an assembly that includes the selected layer and one or more other layers. The method can further include separating the first region and the second region along the boundary such that each of the first region and the second region forms a side wall, the side wall including exposed portions of the conductive features, the exposed portions capable of forming electrical connection with a conductive shielding layer.

A substrate assembly includes at least one printed circuit (PC) substrate. Each PC substrate includes a PC top surface and a PC bottom surface spaced from each other and an edge that runs at least partially about a periphery of the PC substrate between the PC top surface and the PC bottom surface. The edge includes or defines on a facet or edge surface of the edge at least one projection that extends transverse or normal to the facet or edge surface. The projection includes a projection top surface and a projection bottom surface spaced from each other and the projection can include or be made of conductive material.

A stripline radio-frequency (RF) connection interface is provided and includes first and second printed circuit boards (PCBs). The first PCB includes a first trace, ground planes at opposite sides of the first trace, dielectric material interposed between the first trace and the ground planes and a first end. The first end is formed as a first rabbet at which the first trace is exposed. The second PCB includes a second trace, ground planes at opposite sides of the second trace, dielectric material interposed between the second trace and the ground planes and a second end. The second end is formed as a second rabbet, which is substantially identical to the first rabbet, at which the second trace is exposed. The first and second ends are mated in a shiplap joint to electrically couple the first and second traces.

A circuit board and method of manufacture therefor utilize voltage domain edge plating disposed on at least a portion of one or more edges of a circuit board to electrically couple voltage domain conductive shapes disposed in different conductive layers of the circuit board. By doing so, interconnection of multiple voltage domain conductive shapes in different conductive layers may be facilitated with improved power integrity, while also providing EMI shielding along the edge of the circuit board.

A module includes: a substrate having a main surface and a side surface; an electronic component mounted on the main surface; a sealing resin that covers the main surface and the electronic component; and a shield film that covers a surface of the sealing resin and the side surface of the substrate. The sealing resin includes: a resin component containing an organic resin as a main component; and a granular filler containing an inorganic oxide as a main component. On a surface of the sealing resin, which is in contact with the shield film, parts of some grains of the filler are exposed from the resin component, a surface of the resin component includes a nitrogen functional group, and the shield film is formed of a metal that is a passivation metal and a transition metal or an alloy containing the metal.

A multilayer substrate connecting body includes first and second multilayer substrates. The first and second multilayer substrates each include a step portion defined by a difference of a number of stacked layers of insulating base material layers, and a portion of a conductor pattern is exposed to the step portion. An anisotropic conductive film is disposed between the step portions of the first and second multilayer substrates, and portions of conductor patterns that are exposed to the step portions of the first and second multilayer substrates are electrically connected through an electrically connecting portion of the anisotropic conductive film.

An electronic device module includes: a substrate; at least one electronic device mounted on a first surface of the substrate; a connection portion mounted on the first surface of the substrate; and a shielding portion disposed along an external surface of the connection portion and electrically connected to a ground of the substrate through at least one connection conductor.

An interconnection includes a circuit board assembly and a hybrid cable assembly. The circuit board assembly includes first and second outer layer assemblies and an intermediate layer assembly. The first and second outer layer assemblies each include an electrically conductive layer. A cable-receiving space is formed at a first side edge of the circuit board assembly. The hybrid cable assembly includes a dielectric waveguide system having a core and a cladding and being configured to transmit a radar wave in a frequency range from about 70 to about 300 GHz. A first conductor system configured to transmit power and/or data is disposed adjacent to the dielectric waveguide system and includes an electrically conductive inner conductor assembly inserted into the cable-receiving space and galvanically connected to a first inner-conductor connection region. The core of the dielectric waveguide system is inserted into the cable-receiving space and disposed at a waveguide connection region.

Semiconductor assemblies including thermal layers and associated systems and methods are disclosed herein. In some embodiments, the semiconductor assemblies comprise one or more semiconductor devices over a substrate. The substrate includes a thermal layer configured to transfer thermal energy along a lateral plane and across the substrate. The thermal energy is transferred along a non-lateral direction from the semiconductor device to the graphene layer using one or more thermal connectors.

Discovered is a daughter circuit board for direct connection to another mother circuit board. The daughter circuit board has an edge electrode for conductive connection to a surface pad on the mother board. An opening in the daughter circuit board can be aligned with the surface pad on the mother circuit board. The opening can contain solder which when reflowed can establish a bond between the daughter circuit board and the surface pad on the mother circuit board.