A circuit board according to an embodiment includes an insulating layer; a second outer circuit pattern disposed on an upper surface of the insulating layer; and a via disposed in the insulating layer and connected to the second outer circuit pattern; wherein the second outer circuit pattern includes: a first pattern embedded in the insulating layer and having a first width; and a second pattern protruding on the upper surface of the insulating layer, having a second width greater than the first width, and connected to the first pattern through the via.

A wiring circuit board includes an insulating layer having a via penetrating in a thickness direction, a first conductive layer disposed on a one-side surface in the thickness direction of the insulating layer, a second conductive layer disposed on the other-side surface in the thickness direction of the insulating layer, and a conductive portion disposed on an inner peripheral surface of the via and electrically connecting the first and second conductive layers. Length L of 1 .Math.m-10 .Math.m inclusive, is measured by: drawing a segment joining first and second connection points from respectively, the one-side surface to the other-side surface in the thickness direction of the insulating layer and the inner peripheral surface in the cross-sectional view; identifying an outermost position farthest outward from the segment on the inner peripheral surface in the cross-sectional view; and measuring the length as the shortest distance from the segment to the outermost position.

A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

Provided herein is a conductive pattern making method and conductive pattern, the method including forming a groove such that its width in an inlet area is bigger than its width in an inner area; filling the groove with a conductive ink composition; and drying the conductive ink composition so that a solvent contained in the conductive ink composition inside the groove is volatilized to reduce the volume of the conductive ink composition.

A circuit board includes a plurality of first insulating base materials and a plurality of second insulating base materials that are alternately laminated, a first metal layer being formed into a pattern shape on a first surface of the first insulating base material, and a second metal layer being formed into a pattern shape on a second surface of the first insulating base material. The first metal layer is formed into a trapezoidal shape that is large in diameter on a first surface side of the first insulating base material. The second metal layer is formed into a trapezoidal shape that is large in diameter on a second surface side of the first insulating base material. The first metal layers and the second metal layers are laminated in such a manner that the trapezoidal shapes are alternately oriented.

A method for manufacturing a component carrier includes i) providing a metal layer, in particular a copper layer; ii) forming a film on the metal layer; iii) patterning the film in order to expose a part of the metal layer; iv) carrying out a first etch, thereby thinning the film and removing a further part of the exposed metal layer; and thereafter v) carrying out a second etch, thereby forming at least one metal trace that is spatially separated from the metal layer. A component carrier made by the method is further described.

A wiring substrate includes a first conductor layer including wirings, an interlayer insulating layer formed on and covering the first conductor layer, a wiring layer formed in the interlayer insulating layer and including wirings, a second conductor layer formed on the interlayer insulating layer and including wirings, and a via conductor formed in the interlayer insulating layer such that the via conductor is penetrating through the interlayer insulating layer and connecting the first and second conductor layers. The interlayer insulating layer includes first and second insulating layers such that the wiring layer is formed on a surface of the first insulating layer, and the wiring layer is formed such that an aspect ratio of the wirings in the wiring layer is in the range of 2.0 to 6.0 and that aspect ratios of the wirings in the first and second conductor layers are in the range of 1.0 to 2.0.

A bonded substrate includes a substrate, a metal plate forming a stacked state with the substrate, and bonding member. The metal plate has a first surface on the substrate side and a second surface opposite; wherein an edge of the first surface is located outside an edge of the second. The bonding member is disposed between the substrate and plate to bond the plate and substrate, and protrudes from the edge over an entire periphery of the plate. In cut surfaces obtained by cutting the bonded substrate, a peripheral surface length (A) from a portion corresponding to a peripheral edge of the first surface to a corresponding portion of the second, protrusion length of the bonding member, and thickness (C) of the metal plate satisfy first and second expressions.
0.032≤B/(A+B)≤0.400  (First Expression)
0.5(mm)≤C≤2.0(mm)  (Second Expression)

A method of manufacturing a wiring board includes a stacking process in which N (N is an integer equal to or greater than 2) wiring layers, end portions of which include linear conductor patterns, are stacked, with the end portions superimposed, via substrates (insulating layers) provided among the wiring layers and a laminated plate is manufactured and a removing process in which the insulating layers around the end portions of the conductor patterns of the laminated plate are removed to machine the end portions into N flying leads projecting from an end face.

Provided is a method for manufacturing a wiring board that forms a wiring layer having favorable adhesion without a resin resist pattern. A method prepares a substrate with seed-layer including: a underlayer on the surface of an insulating substrate; and a seed layer on the surface of the underlayer, the seed layer having a predetermined pattern and containing metal; presses a solid electrolyte membrane against the seed layer and the underlayer, and applies voltage between an anode and the underlayer to reduce metal ions in the membrane and form a metal layer on the surface of the seed layer; and removes an exposed region without the seed layer and the metal layer of the underlayer to form a wiring layer including the underlayer, the seed layer and the metal layer on the surface of the substrate.