A circuit module includes a substrate on which a first electrode and a second electrode are provided, a first electronic component, and a first resin layer. The first electrode includes a first electrode base body and a first plating film. The second electrode and the first electronic component are covered with the first resin layer. The second electrode includes a second electrode base body, a metal column, whose one end is directly connected to the second electrode base body and another end is positioned in an inner side relative to an outer surface of the first resin layer, a second plating film with a cylindrical shape covering a side surface of a connection body of the second electrode base body and the metal column, and a covering portion connected to the other end of the metal column.

An electronic device is provided, including an electronic element, and a protective substrate. The protective substrate includes a concave portion, and a flat portion. The concave portion has a concave surface and a convex surface that is opposite to the concave surface. The flat portion is connected to the concave portion. The electronic element overlaps the concave portion and is arranged under the convex surface.

A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers; and at least one via configured for solder attachment to a connector lead of a surface mount connector, the at least one via including a conductive element that extends from an upper surface of the printed circuit board through one or more of the plurality of layers, the conductive element having a recess in a surface thereof. The recess is configured to receive a tip portion of the connector lead of the surface mount connector. The printed circuit board may have via patterns including signal vias and ground vias.

A memory card includes a substrate, first row terminals and second row terminals. The substrate has a first pair of side edges extending in a first direction and a second pair of side edges extending in a second direction perpendicular to the first direction. The first row terminals are arranged adjacent to an insertion side edge of the substrate, the first row terminals including a first power terminal, the insertion side edge being one of the first pair of side edges. The second row terminals are arranged further from the insertion side edge than the first row terminals, the second row terminals including a second power terminal. At least one recessed terminal among the first and second row terminals includes a recess area in an exposed surface of the at least one terminal.

A memory card includes a substrate, first row terminals and second row terminals. The substrate has a first pair of side edges extending in a first direction and a second pair of side edges extending in a second direction perpendicular to the first direction. The first row terminals are arranged adjacent to an insertion side edge of the substrate, the first row terminals including a first power terminal, the insertion side edge being one of the first pair of side edges. The second row terminals are arranged further from the insertion side edge than the first row terminals, the second row terminals including a second power terminal. At least one terminal among the first and second row terminals includes a recess area in an exposed surface of the at least one terminal.

A memory card includes a substrate, first row terminals and second row terminals. The substrate has a first pair of side edges extending in a first direction and a second pair of side edges extending in a second direction perpendicular to the first direction. The first row terminals are arranged adjacent to an insertion side edge of the substrate, the first row terminals including a first power terminal, the insertion side edge being one of the first pair of side edges. The second row terminals are arranged further from the insertion side edge than the first row terminals, the second row terminals including a second power terminal. At least one terminal among the first and second row terminals includes a recess area in an exposed surface of the at least one terminal.

A wiring substrate includes a first wiring layer on a surface of a first insulating layer; a via interconnect including a first portion connected to the first wiring layer and a second portion formed monolithically with the first portion and extending from an end of the first portion in a direction away from the first wiring layer; a second insulating layer on the first insulating layer; and a second wiring layer on the second insulating layer, contacting a first surface of the second portion. The area of a cross section of the first portion, parallel to the surface of the first insulating layer, increases as the position of the cross section approaches the first wiring layer from the second portion. The second portion includes a second surface that is opposite from its first surface and extends horizontally from the end of the first portion to overhang the first portion.

A wiring substrate includes an insulating layer and a wiring layer buried in the insulating layer at a first surface of the insulating layer. The wiring layer includes a first portion and a second portion. The first portion is narrower and thinner than the second portion. The first portion includes a first surface exposed at the first surface of the insulating layer. The second portion includes a first surface exposed at the first surface of the insulating layer and a second surface partly exposed in an opening formed in the insulating layer. The opening is open at a second surface of the insulating layer opposite to the first surface thereof.

The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole, an overhang of a metal foil formed at an opening of the hole, and lower space formed between the overhang and an inside wall of the hole, by using a conformal method or a direct laser method; and (2) a step of filling in the hole by forming electrolytic filling plating layers within the hole and on the metal foil, wherein the filling-in of the hole by the formation of electrolytic filling plating layers in the step (2) is carried out by temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating, and increasing it again.

A wiring substrate includes a first wiring layer on a surface of a first insulating layer; a via interconnect including a first portion connected to the first wiring layer and a second portion formed monolithically with the first portion and extending from an end of the first portion in a direction away from the first wiring layer; a second insulating layer on the first insulating layer; and a second wiring layer on the second insulating layer, contacting a first surface of the second portion. The area of a cross section of the first portion, parallel to the surface of the first insulating layer, increases as the position of the cross section approaches the first wiring layer from the second portion. The second portion includes a second surface that is opposite from its first surface and extends horizontally from the end of the first portion to overhang the first portion.