Methods and devices that identify a silkscreen data file associated with a physical printed circuit board and use an image of the physical printed circuit board to display a virtual silkscreen over the image of the physical printed circuit board.

An electronic module includes a substrate having a first main surface and a second main surface, first electronic components on the first main surface, second electronic components on the second main surface, a first sealing resin portion, and a second sealing resin portion. Through holes are formed so as to extend through the substrate and the first sealing resin portion. A third electronic component is placed in the through holes. An area between the through holes and the third electronic component is filled with the second sealing resin portion, and the second sealing resin portion is formed to be exposed at a surface of the first sealing resin portion. When viewed in a direction perpendicular to the first main surface, the second sealing resin portion surrounds the third electronic component. The first sealing resin portion and the second sealing resin portion are made of different types of resins.

An integrated multilayer assembly for an electronic device includes a first substrate film configured to accommodate electrical features on at least first side thereof, said first substrate film having the first side and a substantially opposing second side, a second substrate film configured to accommodate electrical features on at least first side thereof, said second substrate film having the first side and a substantially opposing second side, the first sides of the first and second substrate films being configured to face each other, at least one electrical feature on the first side of the first substrate film, at least one other electrical feature on the first side of the second substrate film, and a molded plastic layer between the first and second substrate films at least partially embedding the electrical features on the first sides thereof.

A circuit board structure, a binding test method and a display device are provided. The circuit board structure includes a first circuit board including a first binding region, a second circuit board including a second binding region matching with the first binding region, and a test circuit configured to test an alignment state of the first circuit board and the second circuit board. The test circuit includes multiple first electrodes and multiple second electrodes insulated from each other and arranged on the first circuit board, and multiple third electrodes arranged on the second circuit board. A group including one of the first electrodes and one of the second electrodes matches with one of the third electrodes, so that a current flows through the test circuit in case that the test circuit is supplied with power.

A system for tracking objects such as a printed circuit board (PCB) undergoing multiple manufacturing processes traceability system includes a coding unit, a scanning unit, and a reading unit and a database. The printed circuit board includes at least two inner copper foil substrates, subsequent substrates can be added. The coding unit marks identification and manufacturing stage codes on the inner copper foil substrate for through scanning by the scanning unit emitting X-rays. The reading unit can receive and parse the codes identified by the X-rays, and determine the previous or a next stage according to a predetermined encoding rule without risk of stage repetition or stage omission or product misplacement. The database stores standard identities and information as to manufacturing stages as a reference.

A printed circuit board having a substrate layer, at least one electrically conductive trace disposed on the substrate layer, and a solder mask layer disposed over the substrate layer and the electrically conductive trace, wherein the solder mask later includes a void region over at least a portion of the electrically conductive trace. Also, a method of optimizing printed circuit board designing including selecting printed circuit board data comprising at least a solder mask layer area, varying the solder mask layer area, determining an insertion loss value for each varied solder mask layer area, comparing the insertion loss values for each varied solder mask layer area, and selecting a solder mask layer area based on the comparing.

A method for manufacturing an integrated multilayer structure includes obtaining a substrate film having first and second sides, providing at least on the first side one or more first functional features, arranging at least one layer upon at least the first side; removing, at least a portion of the substrate film so that space is released in the structure wherein a detachment-enhancing feature provided to the substrate film is configured to facilitate the removal of the at least a portion of the substrate film such that the adjacent remaining film material, if any, the arranged layer and the one or more first functional features are preserved and preferably remain substantially intact; and providing at least one second functional feature into the space released for use so that the at least one second functional feature operatively connects with at least one of the one or more first functional features.

A method for mounting a printed circuit board for an automotive vehicle on a carrier structure including at least one rivet. The printed circuit board includes at least one mounting aperture that is capable of accommodating the rivet and which defines an electrical conduction zone and at least one mark having a control end up to which the mark extends over the electrical conduction zone. The method includes a step of positioning the printed circuit board on the carrier structure such that the rivet extends through the mounting aperture, a step of riveting the rivet such that its head is at least partly flattened on the electrical conduction zone and a step of determining the conformity of riveting when the head of the rivet covers the control end of the mark.

Method for producing a conductor structural element with a layer sequence having an internal layer substrate, including the steps: providing a rigid carrier having an underside and a top side; defining a cut-out section on the rigid carrier; applying at least one electrically insulating layer with a recess in such a way that the cut-out section is exposed; placing an internal layer substrate above the cut-out section with formation of a cavity between the rigid carrier and the internal layer substrate; aligning and fixing the internal layer substrate relative to the rigid carrier; laminating the layer construction prepared in this manner such that resin material of the at least one electrically insulating layer liquefies and encloses the internal layer substrate with the cavity being left free; producing a cut-out by cutting the cut-out section out of the rigid carrier from the outer underside of the rigid carrier.

An electrical element includes an optically-detectable pattern of embedded information. A plurality of thin-film layers is applied on the surface of the substrate wherein one or more of the thin-film layers is at least partially transparent. The plurality of thin-film layers overlaps in an encoding region to form an optical layer structure, wherein at least one of the thin-film layers in the optical layer structure contributes to an electrical function of the electrical element. At least one of the thin-film layers in the optical layer structure includes an information-encoding pattern which contributes to an optically-detectable interference image when illuminated by incident light, and wherein the optically-detectable interference image corresponds to at least a portion of the pattern of embedded information.