According to an embodiment of the disclosure, an electronic device comprises a first printed circuit board including a first electrical terminal exposed on one face of a first area, a second electrical terminal exposed on the one face of a second area and insulated from the first electrical terminal, and a first ground terminal exposed on the one face of a third area formed between the first area and the second area, the third area having a width narrower than a width of the first area or the width of the second area; and a second printed circuit board including a third electrical terminal exposed on one face of a fourth area, a fourth electrical terminal exposed on the one face of a fifth area and electrically connected to the third electrical terminal, and a second ground terminal exposed on the one face of a sixth area located between the fourth area and the fifth area, wherein the second printed circuit board is disposed on the first printed circuit board to overlap the third area, the first electrical terminal and the third electrical terminal are electrically coupled to each other, the second electrical terminal and the fourth electrical terminal are electrically coupled to each other, and the first ground terminal and the second ground terminal are electrically coupled to each other.

A core material has a core 12; a solder layer 16 made of a (Sn—Bi)-based solder alloy provided on an outer side of the core 12; and a Sn layer 20 provided on an outer side of the solder layer 16. The core contains metal or a resin. When a concentration ratio of Bi contained in the solder layer 16 is a concentration ratio (%)=a measured value of Bi (% by mass)/a target Bi content (% by mass), or a concentration ratio (%)=an average value of measured values of Bi (% by mass)/a target Bi content (% by mass), the concentration ratio is 91.4% to 106.7%. The thickness of the Sn layer 20 is 0.215% or more and 36% or less of the thickness of the solder layer 16.

A soft neural interface connector apparatus includes a PCB having a two-dimensional array of solder balls, a transparent top board, a cushioning layer on one side of the transparent top board, and a soft neural interface including a flexible and/or stretchable microelectrode array (MEA) through which neural signals are obtained or delivered. The MEA includes a two-dimensional array of contact pads corresponding to the array of solder balls. The PCB, the transparent top board, the cushioning layer, and the MEA are stacked together such that the MEA is between the cushioning layer and the PCB, and the contact pads are aligned with and in electrical contact with associated solder balls. A magnetic connector system having at least one magnetic connector component on the transparent top board is magnetically connected with at least one magnetic connector component on the PCB to press the contact pads and associated solder balls together.

A ceramic electronic component includes an element body having a dielectric and internal electrodes, the element body having an upper surface, a lower surface, and side surfaces; external electrodes formed on multiple surfaces of the element body, and an oxide layer formed on the upper surface of the element body. Each of the external electrodes has a base layer and a plating layer, the base layer containing metal and having a lower part formed on the lower surface of the element body and a side part formed on one of the side surfaces of the element body and being connected to one or more of the internal electrodes, the plating layers being formed on the lower part of the corresponding base layer. The oxide layer has a surface roughness Ra that is equal to or greater than 0.20 micrometers.

A package carrier includes a build-up circuit structure, a first insulation protective layer, a plurality of connection pads, and a plurality of metal balls. The build-up circuit structure has an upper surface. The first insulation protective layer is disposed on the upper surface of the build-up circuit structure and has a plurality of first openings. The connection pads are respectively disposed in the first openings of the first insulation protective layer and are structurally and electrically connected to the build-up circuit structure. Each of the connection pads has an arc-shaped groove. The metal balls are respectively disposed in the arc-shaped groove of the connection pads. The metal balls and the corresponding connection pads define a plurality of bump structures, and a plurality of top surfaces of the bump structures are on a same plane.

A component carrier includes (a) a first stack with at least one first electrically conductive layer structure and/or at least one first electrically insulating layer structure; (b) a hole formed within the first stack; and (c) a non-deformable solid body closing a portion of the hole and being spaced with respect to side walls of the hole by a gap. A component carrier assembly includes (a) a component carrier as described above; (b) a second stack having at least one second electrically conductive layer structure and/or at least one second electrically insulating layer structure; and (c) a connection piece connecting the first stack with the second stack. Further described are methods for manufacturing such a component carrier and such a component carrier assembly.

A circuit carrier board includes a first substrate and a second substrate bonding to the first substrate. The first substrate includes a first circuit layer connecting to a plurality of conductive structure. The conductive structures connect to electronic elements. The second substrate contacts the first circuit layer. The second substrate includes a plurality of stacked dielectric layers, and a plurality of second circuit layers are disposed in the dielectric layers. The bottommost layer of the second circuit layers is exposed outside of the dielectric layers, and the topmost layer of the second circuit layers is electrically connected to the first circuit layer. The conductive structure includes a pad and a conductive via. The pad electrically connects to the first circuit layer. A linewidth of the first circuit layer is smaller than a linewidth of the second circuit layer. A manufacturing method of the circuit carrier board is also provided.

A display apparatus including a display panel including a base substrate and a first pad electrode on a first pad portion of the base substrate, a flexible substrate connected to the first pad portion, and a driving chip electrically connected to the flexible substrate. The flexible substrate includes a first film layer, a first wiring layer on the first film layer and comprising a plurality of wirings, a second film layer on the first wiring layer, and a second wiring layer on the second film layer and comprising a plurality of wirings. The wirings of the second wiring layer include a first_first wiring and a first_second wiring, the first_first wiring and the first_second wiring extend in a same direction along a same line and are spaced from each other by a gap therebetween. The gap is at an edge of the base substrate in a plan view.

A display device includes a display panel including a first signal pad and a second signal pad, a circuit board overlapped with the first and second signal pads, and an adhesive film overlapped with the first and second signal pads and disposed between the circuit board and the display panel. The adhesive film includes a base resin and a plurality of conductive balls dispersed in the base resin. The circuit board includes a first driving pad and a second driving pad. The first and second driving pads protrude toward the adhesive film and are arranged in a first direction. The first and second driving pads overlap with the first and second signal pads, respectively. The display device may be configured to satisfy the inequality:

[00001]$T\ge G+\frac{B\times S}{W+S}.$

A soft neural interface connector apparatus includes a PCB having a two-dimensional array of solder balls, a transparent top board, a cushioning layer on one side of the transparent top board, and a soft neural interface including a flexible and/or stretchable microelectrode array (MEA) through which neural signals are obtained or delivered. The MEA includes a two-dimensional array of contact pads corresponding to the array of solder balls. The PCB, the transparent top board, the cushioning layer, and the MEA are stacked together such that the MEA is between the cushioning layer and the PCB, and the contact pads are aligned with and in electrical contact with associated solder balls. A magnetic connector system having at least one magnetic connector component on the transparent top board is magnetically connected with at least one magnetic connector component on the PCB to press the contact pads and associated solder balls together.