H05K2201/10378

3D electrical integration using component carrier edge connections to a 2D contact array
11626357 · 2023-04-11 · ·

3D electrical integration is provided by connecting several component carriers to a single substrate using contacts at the edges of the component carriers making contact to a 2D contact array (e.g., a ball grid array or the like) on the substrate. The resulting integration of components on the component carriers is 3D, thereby providing much higher integration density than in 2D approaches.

Electrical interposer having shielded contacts and traces
11626696 · 2023-04-11 · ·

A separable and reconnectable connector for semiconductor devices is provided that is scalable for devices having very small contact pitch. Connectors of the present disclosure include signal pins shielded by pins electrically-coupled to ground. One or more signal pins in a contact array are electrically-shielded by at least one ground pin coupled to a ground plane. Embodiments thereby provide signal pins, either single-ended or a differential pair, usable to transmit signals with reduced noise or cross-talk and thus improved signal integrity. Embodiments further provide inner ground planes coupled to connector ground pins to shield pairs of differential signal pins without increasing the size of the connector. Inner grounding layers can be formed within isolation substrates incorporated into connector embodiments between adjacent pairs of signal pins. These buried ground layers provide additional crosstalk isolation in close proximity to signal pins, resulting in improved signal integrity in a significantly reduced space.

INTERCONNECT ARCHITECTURE WITH SILICON INTERPOSER AND EMIB

Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises, a package substrate, an interposer on the package substrate, a first die cube and a second die cube on the interposer, wherein the interposer includes conductive traces for electrically coupling the first die cube to the second die cube, a die on the package substrate, and an embedded multi-die interconnect bridge (EMIB) in the package substrate, wherein the EMIB electrically couples the interposer to the die.

THROUGH MOLD VIA FRAME
20220319971 · 2022-10-06 ·

A via frame. In some embodiments, the via frame includes: a sheet of epoxy mold compound, having a plurality of holes each extending through the sheet of epoxy mold compound, and a plurality of conductive elements, each extending through a respective one of the holes.

Interposer and electronic package

Embodiments include interposers for use in high speed applications. In an embodiment, the interposer comprises an interposer substrate, and an array of pads on a first surface of the interposer substrate. In an embodiment, a plurality of vias pass through the interposer substrate, where each via is electrically coupled to one of the pads in the array of pads. In an embodiment a plurality of heating elements are embedded in the interposer substrate. In an embodiment a first cable is over the first surface interposer substrate. In an embodiment, the first cable comprises an array of conductive lines along the first cable, where conductive lines proximate to a first end of the cable are electrically coupled to pads in the array of pads.

WIRING COMPONENT, MODULE, APPARATUS, AND METHOD FOR MANUFACTURING MODULE

A wiring component includes a first wiring portion including a plurality of wirings arranged side by side in a first direction, a second wiring portion including a plurality of wirings arranged side by side in a second direction, and a coupling portion configured to couple the first wiring portion and the second wiring portion to each other, wherein an angle formed by the first direction and the second direction is changeable by deformation of the coupling portion.

Chip embedded integrated voltage regulator
11652062 · 2023-05-16 · ·

One or more chip-embedded integrated voltage regulators (“CEIVR's”) are configured to provide power to a circuit or chip such as a CPU or GPU and meet power delivery specifications. The CEIVR's, circuit or chip, and power delivery pathways can be included within the same package. The CEIVR's can be separate from the circuit or chip.

Thermal solutions for multi-package assemblies and methods for fabricating the same
11652020 · 2023-05-16 · ·

Integrated circuit assemblies, electronic systems, and methods for fabricating the same are disclosed. An integrated circuit assembly is formed by thermally contacting at least two integrated circuit packages to opposite sides of a shared heat dissipation device. In one embodiment, the at least two integrated circuit packages are electrically attached to an electronic card to form an intermediate integrated circuit assembly. In a further embodiment, the integrated circuit assembly includes at least one intermediate integrated circuit assembly electrically attached to an electronic board.

Circuit module and interposer

A circuit module includes an interposer, and the interposer includes an element body including a first surface, a first interposer terminal provided on the first surface of the element body, and connected to a first external element, a second interposer terminal provided on the first surface of the element body, and connected to a second external element, a first wiring provided in the element body, and electrically connecting the first interposer terminal and the circuit board with each other, a second wiring provided in the element body, and electrically connecting the second interposer terminal and the circuit board with each other, and a bypass wiring provided in the element body and/or on a surface of the element body, and electrically connecting the first interposer terminal and the second interposer terminal with each other.

Multilayer ceramic capacitor
11622449 · 2023-04-04 · ·

In a multilayer ceramic capacitor, an interposer includes, on a side of a first external electrode in a length direction, a first through hole that penetrates the interposer in a stacking direction, and provides electrical conduction between a first joining electrode and a first mounting electrode. The first through hole further includes a first metal film provided on an inner wall thereof. The interposer includes, on a side of a second external electrode in the length direction, a second through hole that penetrates the interposer in the stacking direction, and provides electrical conduction between a second joining electrode and a second mounting electrode. The second through hole further includes a second metal film provided on an inner wall thereof. A first uncovered portion is provided, which is not covered by the first metal film, on a first surface of the inner wall of the first through hole, and a second uncovered portion is provided which is not covered by a second metal film on the first surface of the inner wall of the second through hole.