An integrated circuit (IC) device may include a first substrate having an inductor ground plane in a conductive layer of the first substrate. The integrated circuit may also include a first inductor in a passive device layer of a second substrate that is supported by the first substrate. A shape of the inductor ground plane may substantially correspond to a silhouette of the first inductor.

A substrate structure is provided, which includes a substrate having a plurality of conductors and at least a receiving space formed on a surface of the substrate with the receiving space free from penetrating the substrate. During an encapsulating process, an encapsulant can be filled in the receiving space so as to strengthen the bonding between the substrate and the encapsulant, thereby preventing delamination from occurring therebetween.

The present invention is to provide a microstructure capable of improving the withstand voltage of an insulating substrate while securing fine conductive paths, a multilayer wiring board, a semiconductor package, and a microstructure manufacturing method. The microstructure of the present invention has an insulating substrate having a plurality of through holes, and conductive paths consisting of a conductive material containing metal filling the plurality of through holes, in which an average opening diameter of the plurality of through holes is 5 nm to 500 nm, an average value of the shortest distances connecting the through holes adjacent to each other is 10 nm to 300 nm, and a moisture content is 0.005% or less with respect to the total mass of the microstructure.

A resilient electrical connector assembly includes a base PCB and stacked layers of interconnected resilient conductive structures where each structure has at least two resilient conductive strips and at least two conductive contacts. One contact is integrated with a conductive path on the base PCB and another contact pad is positioned to establish a conductive path with a target PCB when the latter is mounted parallel to the base PCB. The resilient conductive strips flex due to a compressive force exerted between the base PCB and target PCB on the stacked layers. The resilient conductive structures are formed by depositing metal to sequentially form each of the stacked layers with one contact being initially formed in engagement with the conductive path on the base PCB.

Embodiments of the present description relate to the field of fabricating microelectronic substrates. The microelectronic substrate may include a trace routing structure disposed between opposing glass layers. The trace routing structure may comprise one or more dielectric layers having conductive traces formed thereon and therethrough. Also disclosed are embodiments of a microelectronic package including a microelectronic device disposed proximate one glass layer of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects.

A capacitor component includes a capacitor including a plurality of internal electrodes, a capacitor body containing a piezoelectric material disposed in at least regions between the plurality of internal electrodes, and external electrodes connected to the plurality of internal electrodes; and an interposer disposed to be coupled to the capacitor and including a buffer substrate containing a buffer material having a degree of piezoelectricity lower than that of the piezoelectric material, and connection electrodes electrically connected to the external electrodes.

The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.

A voice-controlled electronic device that includes an axisymmetric device housing having a longitudinal axis bisecting opposing top and bottom surfaces and a side surface extending between the top and bottom surfaces. The device can further include a plurality of microphones disposed within the device housing and distributed radially around the longitudinal axis; a processor configured to execute computer instructions stored in a computer-readable memory for interacting with a user and processing voice commands received by the plurality of microphones and first and second transducers configured to generate sound waves within different frequency ranges.

A PoP semiconductor device has a top semiconductor package disposed over a bottom semiconductor package. The top semiconductor package has a substrate and a first semiconductor die disposed over the substrate. First and second encapsulants are deposited over the first semiconductor die and substrate. A first build-up interconnect structure is formed over the substrate after depositing the second encapsulant. The top package is disposed over the bottom package. The bottom package has a second semiconductor die and modular interconnect units disposed around the second semiconductor die. A second build-up interconnect structure is formed over the second semiconductor die and modular interconnect unit. The modular interconnect units include a plurality of conductive vias and a plurality of contact pads electrically connected to the conductive vias. The I/O pattern of the build-up interconnect structure on the top semiconductor package is designed to coincide with the I/O pattern of the modular interconnect units.

An electronic assembly includes a substrate having a first surface and a second surface opposite to the first surface and a plurality of stiffening members coupled to the substrate. The substrate further includes a plurality of substrate interconnects. The electronic assembly further includes a plurality of semiconductor dies mounted on the first surface of the substrate. The plurality of semiconductor dies are electrically connected to each other via the plurality of substrate interconnects. The electronic assembly further includes a plurality of power supply modules mounted on the second surface of the substrate. Each power supply module is disposed opposite to a respective semiconductor die.