An apparatus is provided which comprises: a processor die; a processor substrate having a region extended away from the processor die, wherein the processor die is mounted on the processor substrate, wherein the extended region has at least one signal interface which is connectable to a top-side connector; and an interposer coupled to the processor substrate and a motherboard.

A printed circuit board (PCB) system includes an integrated circuit (IC) package having a main IC chip that is electrically coupled to a top surface of a package substrate. A first printed circuit board (PCB) is electrically coupled to first contact structures on a bottom surface of the package substrate. A heat dissipation member is coupled to the main IC chip. A memory module is configured to electrically couple, via an interposer, with second contact structures on a top surface of the package substrate while the heat dissipation member dissipates heat from the main IC chip away from one or more memory IC chips on the memory module. The interposer is configured to electrically couple the second contact structures of the IC package with the memory module while the heat dissipation member dissipates heat from the main IC chip away from the one or more memory IC chips.

A wiring board includes a base board and a plurality of wiring layers formed of a resin insulating film on the base board, wherein at least one of the wiring layers includes a fine wiring, a barrier film, which is not in contact with the fine wiring, is formed at a more outer side than the base board than the wiring layer including the fine wiring, and different types of resin insulating films are used for a wiring layer at an inner side of the barrier film close to the base board and a wiring layer at an outer side of the barrier film, respectively.

A circuit module includes an interposer, and the interposer includes an element body including a first surface, a first interposer terminal provided on the first surface of the element body, and connected to a first external element, a second interposer terminal provided on the first surface of the element body, and connected to a second external element, a first wiring provided in the element body, and electrically connecting the first interposer terminal and the circuit board with each other, a second wiring provided in the element body, and electrically connecting the second interposer terminal and the circuit board with each other, and a bypass wiring provided in the element body and/or on a surface of the element body, and electrically connecting the first interposer terminal and the second interposer terminal with each other.

An assembly comprises a circuit board structure and a plurality of connection portions. The circuit board structure has a main circuit board and a supplemental circuit board. The main circuit board is formed with an accommodating portion. The accommodating portion is recessed downward in an up-down direction from an upper surface of the main circuit board. The main circuit board has a plurality of upper main conductive portions which are formed on the upper surface of the main circuit board. The supplemental circuit board has a plurality of upper supplemental conductive portions which are formed on an upper surface of the supplemental circuit board. The supplemental circuit board is, at least in part, accommodated in the accommodating portion. Each of ones of the connection portions connects a respective one of the upper main conductive portions and a respective one of the upper supplemental conductive portions with each other.

Readily modifiable and customizable, low-area overhead interconnect structures for forming connections between a system-in-a-package module and other components in an electronic device. One example may provide an interposer for providing an interconnection between a system-in-a-package module and other components in an electronic device. Another may provide a plurality of conductive pins or contacts to form interconnect paths between a module and other components.

An electrical contact, a 3D LED and a method of manufacturing 3D LEDs are described. The electrical contact includes a printed circuit board (PCB) bridge and a PCB connector. The PCB bridge comprises at least one electrical contact. The at least one electrical contact is configured for electrical coupling with at least one interposer of a string of LEDs. The PCB connector is electrically coupled to the PCB bridge. The PCB connector comprises an electrical contact configured for electrical coupling with at least one external electrical wire.

A package component includes a dielectric layer and a metal pad over the dielectric layer. A plurality of openings is disposed in the metal pad. The first plurality of openings is separated from each other by portions of the metal pad, with the portions of the metal pad interconnected to form a continuous metal region.

A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

A manufacturing method of an interposed substrate is provided. A metal-stacked layer comprising a first metal layer, an etching stop layer and a second metal layer is formed. A patterned conductor layer is formed on the first metal layer, wherein the patterned conductor layer exposes a portion of the first metal layer. A plurality of conductive pillars is formed on the patterned conductor layer, wherein the conductive pillars are separated from each other and stacked on a portion of the patterned conductor layer. An insulating material layer is formed on the metal-stacked layer, wherein the insulating material layer covers the portion of the first metal layer and encapsulates the conductive pillars and the other portion of the patterned conductor layer. The metal-stacked layer is removed to expose a lower surface opposite to an upper surface of the insulating material layer and a bottom surface of the patterned conductor layer.