A method includes forming a redistribution structure on a carrier substrate, coupling a first side of a first interconnect structure to a first side of the redistribution structure using first conductive connectors, where the first interconnect structure includes a core substrate, where the first interconnect structure includes second conductive connectors on a second side of the first interconnect structure opposite the first side of the first interconnect structure, coupling a first semiconductor device to the second side of the first interconnect structure using the second conductive connectors, removing the carrier substrate, and coupling a second semiconductor device to a second side of the redistribution structure using third conductive connectors, where the second side of the redistribution structure is opposite the first side of the redistribution structure.

A patterned article includes a unitary polymeric layer and a plurality of electrically conductive elements embedded at least partially in the unitary polymeric layer. Each electrically conductive element includes a conductive seed layer having a top major surface and an opposite bottom major surface in direct contact with the unitary polymeric layer, and includes a metallic body disposed on the top major surface of the conductive seed layer. The metallic body has a bottom major surface and at least one sidewall. The bottom major surface contacts the conductive seed layer. Each sidewall is in direct contact with the unitary polymeric layer and extends from the bottom major surface of the metallic body toward or to, but not past, a top major surface of the unitary polymeric layer. The conductive elements may be electrically isolated from one another. Processes for making the patterned article are described.

A method includes attaching a substrate to a carrier, aligning external connectors on a first surface of a first semiconductor package to first conductive pads on a first surface of the substrate facing away from the carrier, and performing a reflow process, where a difference in coefficients of thermal expansion (CTEs) between the substrate and the carrier causes a first shape for the first surface of the substrate during the reflow process, where differences among CTEs of materials of the first semiconductor package causes a second shape for the first surface of the first semiconductor package during the reflow process, and wherein the first shape substantially matches the second shape. The method further includes removing the carrier from the substrate after the reflow process.

A multi-layer substrate structure which can be peeled off precisely includes: a substrate; a first flexible dielectric layer formed on the substrate; a peel-off layer formed on the first flexible dielectric layer; and a unit to be peeled off formed on the peel-off layer; wherein an adhesive force between the peel-off layer and the first flexible dielectric layer is smaller than an adhesive force between the first flexible dielectric layer and the substrate, and the substrate, the first flexible dielectric layer, the peel-off layer, and the unit to be peeled off together form the multi-layer substrate structure. A method for manufacturing a multi-layer substrate structure which can be peeled off precisely is also provided.

A method for manufacturing a flexible panel is provided, and the method includes following steps. A column is formed on a carrier substrate. A flexible layer is formed on the carrier substrate, where at least a part of a side surface of the column is surrounded by the flexible layer, so as to form a through hole in the flexible layer. A component layer is formed on the flexible layer, and the column and the carrier substrate are removed. No chars, cracks, and cutting marks are formed on an edge of the through hole of the flexible panel.

A mini smart card and a method of manufacturing the mini smart card are introduced. The method includes disposing bilayered print layers on a top side and a bottom side of a circuit layer, respectively; performing a heat-compression treatment and then a printing treatment on the circuit layer and the bilayered print layers; removing surface layers from the bilayered print layers; and disposing transparent protective layers on the bilayered print layers, respectively. The bilayered print layers are prevented from deforming under the heat generated during the printing treatment. Removal of the surface layers from the bilayered print layers effectively reduces the thickness of the mini smart card.

A multi-layer ceramic electronic component includes: a ceramic body including internal electrodes laminated in one axial direction and having a main surface facing in the one axial direction; and an external electrode including a base layer including a step portion formed on the main surface, and a plated layer formed on the base layer, the external electrode being connected to the internal electrodes.

A power chip package module and a manufacturing method thereof are provided. In the manufacturing method, a temporary carrier having an alignment pattern is provided, in which the temporary carrier includes a base and a peelable adhesive material disposed on the base. Thereafter, a circuit board having an accommodating space passing therethrough is disposed on the temporary carrier according to the alignment pattern. Furthermore, a chip is disposed in the accommodating space with an active surface thereof facing the temporary carrier according to the alignment pattern, in which the chip is fixed on the temporary carrier by the peelable adhesive material. The accommodating space is filled with a molding material to form an initial package structure. The initial package structure is separated from the temporary carrier, and then an electrically and thermally conductive layer is formed on a bottom surface of the chip and is in contact therewith.

A package carrier includes a substrate, at least one interposer disposed in at least one opening of the substrate, a conductive structure layer, a first build-up structure, and a second build-up structure. The interposer includes a glass substrate, at least one conductive via, at least one first pad, and at least one second pad. The conductive via passes through the glass substrate, and the first and the second pads are disposed respectively on an upper surface and a lower surface of the glass substrate opposite to each other and are connected to opposite ends of the conductive via. The conductive structure layer is disposed on the substrate and is structurally and electrically connected to the first and the second pads. The first and the second build-up structures are disposed respectively on the first and the second surfaces of the substrate and are electrically connected to the conductive structure layer.

An objective is to provide a stretchable conductor sheet which is useful as a material for electrical wiring and electrodes for garment-type electronic devices, the material having excellent durability in terms of washing and durability in terms of perspiration. A fabric provided with an electrode and an electrical wiring, which are formed from a stretchable conductor sheet, is obtained by: providing a film having releasability with a first stretchable conductor layer which is formed from a paste material that uses carbon-based particles as a conductive filler, while using a flexible resin as a binder resin; subsequently forming a second stretchable conductor layer, while using metal-based particles as a conductive filler; laminating a hot melt adhesive layer thereon; superposing the resulting laminate on a fabric after removing unnecessary parts from the laminate by means of partial slits; and subjecting the resulting fabric to hot pressing. Since the carbon-based particles adsorb a contamination substance of the metal-based particles, oxidation degradation and sulfuration degradation of the metal-based particles is reduced, thereby improving the durability.