A manufacturing method of a circuit substrate comprises the steps of providing a laminated substrate comprising an insulating layer and a circuit layer disposed on the insulating layer; forming a photoresist layer on the circuit layer; mechanically cutting the photoresist layer and a part of the circuit layer to form gaps; etching the circuit layer in the gaps until a surface of the insulating layer is exposed to form a circuit layout; and removing the photoresist layer to form the circuit substrate.

A method for producing an electric circuit in which a contact carrier comprising a first contact area and a second contact area is provided. An insulating body is applied to the circuit carrier and at least partially covers the first contact area and the second contact area. The insulating body comprises cut-outs in regions both contact areas. A flowable electrical conducting medium is introduced into the insulating body.

The present disclosure relates to an apparatus for manufacturing flexible printed circuit board (FPCB) and method for manufacturing the FPCB, having no limitations of length of a circuit pattern being formed on a base film.

A protection tape for a printed circuit board (PCB) includes an insulating base plate, a conductive layer over the insulating base plate, and an adhesive layer over the conductive layer, the adhesive layer including a main part having a first thickness and a subsidiary part having a second thickness less than the first thickness, the main part corresponding to at least a center portion of the insulating base plate and the subsidiary part being arranged at an outside of the main part.

Methods, systems, and apparatus for fabricating a circuit board. The method includes fabricating, using an additive manufacturing device, a trace layer, a sacrificial layer, a rail layer and a lid. The method includes placing the sacrificial layer on the trace layer such that the raised traces protrude through corresponding openings of the sacrificial layer. The method includes depositing a conductive material on top of the sacrificial layer and the plurality of traces. The method includes removing the sacrificial layer from the trace layer and placing the rail layer on the trace layer such that the raised traces align with the corresponding openings of the rail layer. The method includes connecting one or more electrical components and melting a sealing sheet on top of the rail layer and the electrical components to reinforce connections and to provide protection. The method includes placing the lid on top of the sealing sheet.

A circuit component decal comprising a transparent sheet and an opaque circuit pattern. The transparent sheet includes opposing top and bottom surfaces and a number of edges. The opaque circuit pattern includes an electronic component footprint and a number of circuit lead paths. The electronic component footprint includes a number of contact points representing the location of leads of the electronic component. The circuit lead paths extend from the contact points to the edges of the transparent sheet. The opaque circuit pattern corresponds to only a section of a complete circuit pattern and is configured to block energy from reaching a first portion of the intermediate substrate when the transparent sheet is positioned on the intermediate substrate so as to form the section of the complete circuit pattern.

A circuit component decal comprising a transparent sheet and an opaque circuit pattern. The transparent sheet includes opposing top and bottom surfaces and a number of edges. The opaque circuit pattern includes an electronic component footprint and a number of circuit lead paths. The electronic component footprint includes a number of contact points representing the location of leads of the electronic component. The circuit lead paths extend from the contact points to the edges of the transparent sheet. The opaque circuit pattern corresponds to only a section of a complete circuit pattern and is configured to block energy from reaching a first portion of the intermediate substrate when the transparent sheet is positioned on the intermediate substrate so as to form the section of the complete circuit pattern.

Disclosed is a reflow device of a reflow soldering equipment, the reflow soldering equipment being provided with a reflowing zone, the reflow device comprising: a heating light source; a light mask having a plurality of holes, the light mask being irradiated by the heating light in such a manner that the heating light passes through the holes of the light mask to irradiate into the reflowing zone so as to form a plurality of irradiation areas; and a transporting member having a carrier which carries an object to be processed to move through the reflowing zone along a transporting path, wherein a plurality of predetermined areas to be reflowed are defined in an upper surface of the object to be processed, the carrier is configured to, when the object to be processed is in a position where the predetermined area to be reflowed is within the irradiation area respectively, halt at the position for a predetermined irradiation time, and then continue to move forward and move through the reflowing zone.

A method for manufacturing a circuit, in particular of a hearing aid, in which method a printed circuit board is made available with a first region and with a second region which are separated by means of a boundary. A component is mounted on the printed circuit board, wherein the component is positioned on the boundary. The first region is covered by means of a mask which has an edge, wherein the edge is positioned on the component, and the printed circuit board is provided with a coating. The coating is cut away in the region of the component and the mask is removed.

A method for forming a multilayered circuit pattern on a surface of a 3D metal board includes: forming a first insulation layer on the surface of the 3D metal board; forming a first conductive pattern on the first insulation layer; forming a second insulation layer on the first conductive pattern except for a predetermined region; forming a second conductive pattern on the second insulation layer; and forming a third insulation layer on the second conductive pattern except for one or more circuit element mounting regions.