A multilayer circuit board comprises an inner circuit board, a tin layer, at least one outer circuit board, and a solder mask. The inner circuit board comprises at least one first mounting region and at least one second mounting region. The tin layer is formed on a surface of the inner circuit board except the first mounting region connecting the outer circuit board. The outer circuit board comprises at least one first opening to expose the first mounting region and at least one second opening to expose a portion of the tin layer covering the second mounting region. The inner circuit board, the tin layer, and the outer circuit board together form a middle structure. The solder mask covers the middle structure except the portion and the first mounting region. A treatment layer is formed on the first mounting region.

One or more channels are provided in the surface of a conductive layer of a PCB substrate in an area on which a component is to be placed. The channels can help reduce or prevent shifting of the component during reflow soldering through surface tension/capillary forces of the solder paste material in the channels. Such channels also can be used, for example, by an image processing system to facilitate accurate positioning and/or alignment of the component. The image processing system can use the location of the channels alone, or in combination with other features such as a solder mask or other alignment marks, to position and/or align the component with high accuracy.

A circuit board including a substrate, a patterned circuit layer and a photo-imaginable dielectric layer is provided. The substrate has a first surface and a second surface opposite to each other. The patterned circuit layer is disposed on the first surface, and a line width of the patterned circuit layer gradually reduces from the first surface towards the second surface. The photo-imaginable dielectric layer is disposed in the substrate corresponding to the patterned circuit layer. In addition, a manufacturing method of the circuit board is also proposed.

The present disclosure relates to a method of manufacturing a layer structure for a component carrier. According to the method, a carrier layer is provided. An imprint resist layer is added onto the carrier layer and predefined structures forming at least one recess are stamped into the imprint resist layer by a predefined stamp. The recess defines a filling structure in or on the carrier layer. In the filling structure at least one of an electrically insulating material and an electrically conductive material is filled.

A circuit board including a substrate, a patterned circuit layer and a photo-imaginable dielectric layer is provided. The substrate has a first surface and a second surface opposite to each other. The patterned circuit layer is disposed on the first surface, and a line width of the patterned circuit layer gradually reduces from the first surface towards the second surface. The photo-imaginable dielectric layer is disposed in the substrate corresponding to the patterned circuit layer. In addition, a manufacturing method of the circuit board is also proposed.

A method of manufacturing a substrate includes applying solder resist ink containing a mixing resin of epoxy-based resin and acrylic-based resin on at least one surface of a substrate body to form a solder resist layer, and irradiating a predetermined portion of the solder resist layer with ultraviolet rays and controlling an amount of irradiation of the ultraviolet rays irradiated to the predetermined of the solder resist layer to form the predetermined portion in transmissivity that transmits light.

An embedded device 105 is assembled within a flexible circuit assembly 30 with the embedded device mid-plane intentionally located in proximity to the flexible circuit assembly central plane 115 to minimize stress effects on the embedded device. The opening 18, for the embedded device, is enlarged in an intermediate layer 10 to enhance flexibility of the flexible circuit assembly.

An embedded device 105 is assembled within a flexible circuit assembly 30 with the embedded device mid-plane intentionally located in proximity to the flexible circuit assembly central plane 115 to minimize stress effects on the embedded device. The opening 18, for the embedded device, is enlarged in an intermediate layer 10 to enhance flexibility of the flexible circuit assembly.

The present invention provides a method for manufacturing a conductive pattern, comprising the steps of: a) forming a conductive film on a substrate; b) forming an etching resist pattern on the conductive film; and c) forming a conductive pattern having a smaller line width than a width of the etching resist pattern by over-etching the conductive film by using the etching resist pattern, and a conductive pattern manufactured by using the same. According to the exemplary embodiment of the present invention, it is possible to effectively and economically provide a conductive pattern having a ultrafine line width.

Disclosed are a method for manufacturing a touch panel, a touch panel and a touch display device. The method includes: forming signal lines and multiple connection bridges disposed in a matrix on a substrate; forming multiple isolation films on the substrate provided with the signal lines and the multiple connection bridges, where the multiple isolation films are in one-to-one correspondence with the multiple connection bridges and each isolation film covers a portion of one corresponding connection bridge; and forming multiple first touch electrodes and multiple second touch electrodes made of nano-silver on the substrate provided with the multiple isolation films. The first touch electrodes and the second touch electrodes are connected to the signal lines. Each first touch electrode includes multiple first sub-electrodes. Adjacent first sub-electrodes are bridged through corresponding connection bridges. The second touch electrodes are insulated from the connection bridges through the isolation films.