A wiring board includes an insulation substrate, a through-conductor, and a wiring conductor. The insulation substrate includes a first surface, a second surface opposite to the first surface, and a through-hole extending from the first surface to the second surface. The through-conductor is located in the through-hole and on an opening of the through-hole on a first surface side. The wiring conductor is located on the first surface and connected to the through-conductor. The through-conductor and the wiring conductor contain copper as a main component. The average size of Cu crystal grains in the through-conductor is larger than the average size of Cu crystal grains in the wiring conductor.

A multi-layer circuit structure is disposed on the delivery loading plate through the bottom-layer circuit structure, the delivery loading plate exposes the conductive corrosion-barrier layer, and the top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. Therefore, before the multi-layer circuit board is delivered to the assembly company or before the multi-layer circuit board is packaged with chips, an electrical testing can be applied to the multi-layer circuit board.

A multi-layer circuit board is formed multiple layers of a catalytic layer, each catalytic layer having an exclusion depth below a surface, where the cataltic particles are of sufficient density to provide electroless deposition in channels formed in the surface. A first catalytic layer has channels formed which are plated with electroless copper. Each subsequent catalytic layer is bonded or laminated to an underlying catalytic layer, a channel is formed which extends through the catalytic layer to an underlying electroless copper trace, and electroless copper is deposited into the channel to electrically connect with the underlying electroless copper trace. In this manner, traces may be formed which have a thickness greater than the thickness of a single catalytic layer.

A wiring substrate includes a substrate containing a resin as a main component and including a mixed layer in which the resin and a catalyst are mixed together; and a metal wire disposed to cover the mixed layer and being in contact with the catalyst. The wiring substrate with such a configuration can increase the adhesion of the metal wire to the substrate.

A multi-layer circuit board is formed multiple layers of a catalytic layer, each catalytic layer having an exclusion depth below a surface, where the cataltic particles are of sufficient density to provide electroless deposition in channels formed in the surface. A first catalytic layer has channels formed which are plated with electroless copper. Each subsequent catalytic layer is bonded or laminated to an underlying catalytic layer, a channel is formed which extends through the catalytic layer to an underlying electroless copper trace, and electroless copper is deposited into the channel to electrically connect with the underlying electroless copper trace. In this manner, traces may be formed which have a thickness greater than the thickness of a single catalytic layer.

A surface finish for a printed circuit board (PCB) and semiconductor wafer includes a nickel disposed over an aluminum or copper conductive metal surface. A barrier layer including all or fractions of a nitrogen-containing molecule is deposited on the surface of the nickel layer to make a barrier layer/electroless nickel (BLEN) surface finish. The barrier layer allows solder to be reflowed over the surface finish. Optionally, gold (e.g., immersion gold) may be coated over the barrier layer to create a nickel/barrier layer/gold (NBG) surface treatment. Presence of the barrier layer causes the surface treatment to be smoother than a conventional electroless nickel/immersion gold (ENIG) surface finish. Presence of the barrier layer causes a subsequently applied solder joint to be stronger and less subject to brittle failure than conventional ENIG.

A circuit structure that comprises a substrate and one or more conductive elements disposed on the substrate is provided. The substrate comprises a polymer composition that comprises an electrically conductive filler distributed within a polymer matrix. The polymer matrix contains at least one thermoplastic high performance polymer having a deflection temperature under load of about 40° C. or more as determined in accordance with ISO 75-2:2013 at a load of 1.8 MPa, and the polymer composition exhibits a dielectric constant of about 4 or more and a dissipation factor of about 0.3 or less, as determined at a frequency of 2 GHz.

A method of performing an immersion tin process in the production of a component carrier is provided which includes immersing at least a part of a copper surface of the component carrier in a composition containing Sn(II) in an immersion tin unit, while passing a non-oxidizing gas through the immersion tin unit, wherein at least part of the non-oxidizing gas is recycled. In addition, an apparatus for performing an immersion tin process in the production of a component carrier, a method of performing a copper plating process in the production of a component carrier and an apparatus for performing a copper plating process in the production of a component carrier are provided.

According to one aspect of the present invention, a printed circuit board includes: an insulating base film; a conductive pattern that is partially layered on a surface side of the base film; a coating layer that is layered on a surface of a layered structure including the base film and the conductive pattern and having an opening portion that partially exposes the conductive pattern; and a tin plating layer that is layered on a surface of the conductive pattern exposed from the opening portion, wherein an average peel length of the coating layer from the conductive pattern with an inner edge of the opening portion as a base end is less than or equal to 20 μm.

A printed circuit board according to one embodiment of the present invention is a printed circuit board including a plate-shaped or a sheet-shaped insulating material having a penetrating hole, and a metal plating layer layered on both surfaces of the insulating material and an inner peripheral surface of the insulating material, wherein an inner diameter of the penetrating hole monotonically decreases from a top surface of the insulating material toward a back surface, and wherein the inner diameter of the penetrating hole at a center in a thickness direction of the insulating material is smaller than an average of an opening diameter on the top side and an opening diameter on the back side.