A multilayer substrate and a manufacturing method thereof are disclosed. The multilayer substrate includes two or more dielectric layers laminated in sequence; a public line disposed at a top or bottom dielectric layer of the two or more dielectric layers; and two or more first through hole pillars respectively each embedded in a respective one of the dielectric layers, and the first through hole pillars are connected in cascade and then connected with the public line.

To provide a method for manufacturing a laminate body with excellent heat resistance (solder heat resistance, for example) and excellent conduction reliability in which a small diameter via hole can be formed. RESOLUTION MEANS To provide a manufacturing method of a laminate body, containing: a step of forming onto a supporting body a curable resin composition layer formed from a thermosetting resin composition to obtain a curable resin composition layer with a supporting body; a step of laminating the aforementioned curable resin composition with a supporting body onto a substrate on a curable resin composition layer forming surface side to obtain a pre-cured composite with a supporting body formed from a substrate and a curable resin composition layer with a supporting body; a step of performing a first heating of the aforementioned composite and thermally curing the aforementioned curable resin composition layer to form a cured resin layer to obtain a cured composite with a supporting body formed from a substrate and a cured resin layer with a supporting body; a step of performing hole punching from the aforementioned supporting body side of the aforementioned cured composite with a supporting body to form a via hole in the aforementioned cured resin layer; a step of peeling the aforementioned supporting body from the aforementioned cured composite with a supporting body to obtain a cured composite formed from a substrate and a cured resin layer a step of removing resin residue in the via hole of the aforementioned cured composite; a step of performing a second heating of the aforementioned cured composite; and a step of forming a conductor layer on an inner wall surface of the via hole of the aforementioned cured composite and on the aforementioned cured resin layer.

Problem: To provide a method for manufacturing a laminate body with excellent heat resistance (solder heat resistance, for example), in which a small diameter via hole can be formed. RESOLUTION MEANS: The provision of a manufacturing method of a laminate body, containing: a step of forming onto a supporting body a curable resin composition layer formed from a thermosetting resin composition to obtain a curable resin composition layer with a supporting body; a step of laminating the aforementioned curable resin composition layer with a supporting body onto a substrate on a curable resin composition layer forming surface side to obtain a pre-curing composite with a supporting body formed from a substrate and a curable resin composition layer with a supporting body; a step of performing a first heating of the aforementioned composite and thermally curing the aforementioned curable resin composition layer to form a cured resin layer to obtain a cured composite with a supporting body formed from a substrate and a cured resin layer with a supporting body; a step of performing hole punching from the aforementioned supporting body side of the aforementioned cured composite with a supporting body to form a via hole in the aforementioned cured resin layer; a step of peeling the aforementioned supporting body from the aforementioned cured composite with a supporting body to obtain a cured composite formed from a substrate and a cured resin layer, a step of performing a second heating of the cured composite; a step of removing resin residue in the via hole of the aforementioned cured composite; and an step of forming a conductor layer on an inner wall surface of the via hole of the aforementioned cured composite and on the aforementioned cured resin layer; wherein the forming of the conductor layer in the via hole is performed via electroless plating or a combination of electroless plating and electrolytic plating.

Provided is a surface-treated copper foil excellent in laser processability. The surface-treated copper foil includes a roughened surface formed by subjecting a surface to a roughening treatment, in which when measured using a three-dimensional roughness meter, the roughened surface has a surface skewness Ssk within a range of from −0.300 to less than 0 and an arithmetic mean summit curvature Ssc within a range of from 0.0220 nm.sup.−1 to less than 0.0300 nm.sup.−1.

The present invention relates to a method for fabricating blackened conductive patterns, which includes (i) forming a resist layer on a non-conductive substrate; (ii) forming fine pattern grooves in the resist layer using a laser beam; (iii) forming a mixture layer containing a conductive material and a blackening material in the fine pattern grooves; and (iv) removing the resist layer remained on the non-conductive substrate.

Provided is a copper foil provided with a carrier in which the laser hole-opening properties of the ultrathin copper layer are good and which is suitable for producing a high-density integrated circuit substrate. A copper foil provided with a carrier having, in order, a carrier, an intermediate layer, and an ultrathin copper layer, wherein the specular gloss at 60° in an MD direction of the intermediate layer side surface of the ultrathin copper layer is 140 or less.

A method of plating a copper substrate with gold that reduces or eliminates the presence of microvoids at the interface of the gold/copper substrate is described. Suitably, live entry of the substrate into the plating bath is performed with application of external current to the bath such that no portion of the substrate is exposed to the bath for more than one second without the application of the external current. Increase of the applied current for gold strike to the mass-transfer-limit for gold reduction accomplishes the full measure of improvement in eliminating microvoids.

The present invention provides a novel method of constructing a coax spring-pin socket that furnishes better performance and is easier to manufacture in volume using common dielectrics and copper plating. This is accomplished by, in application, a lamination of PCB dielectric layers. This dielectric block is then drilled, plated, etched, and drilled in steps for the construction of a coaxial structure for the signal pins, and a ground structure for ground pins. This design process that can be quickly adjusted and customized for each design.

A method for fabricating a conductive trace structure includes the steps: forming a first metal layer on a non-conductive substrate; removing a part of the first metal layer to expose the non-conductive substrate so as to form the first metal layer into a plating region and a non-plating region, the plating region being divided into at least two trace-forming portions and at least one bridge portion; forming a second metal layer on the plating region by electroplating the plating region using one of the trace-forming portions and the bridge portion as an electrode; and removing the bridge portion and the second metal layer formed on the bridge portion.

A method for manufacturing a component carrier includes covering a dielectric layer structure by a metal foil, forming an electroless metal layer on the metal foil, and forming a multi-stage electroplating structure on the electroless metal layer. A component carrier made by the method is further described.