Patent classifications
H10K59/124
DISPLAY DEVICE WITH PROTECTION AND ENCAPSULATION LAYERS TO SEAL DISPLAY UNIT
A display device includes a substrate, a display unit disposed over the substrate, and an encapsulation layer sealing the display unit. The display unit includes a thin film transistor, a display element electrically connected to the thin film transistor, a protection layer, and a planarization layer. The protection layer and the planarization layer are disposed between the thin film transistor and the display element. The display unit includes a display area and a non-display area outside the display area. The non-display area includes a voltage line. The planarization layer includes a dividing region dividing the planarization layer into a center portion and an outer portion. The dividing region surrounds the display area. The voltage line is partially disposed in the dividing region. The protection layer at least covers the sides of the voltage line disposed in the dividing region.
DISPLAY DEVICE WITH PROTECTION AND ENCAPSULATION LAYERS TO SEAL DISPLAY UNIT
A display device includes a substrate, a display unit disposed over the substrate, and an encapsulation layer sealing the display unit. The display unit includes a thin film transistor, a display element electrically connected to the thin film transistor, a protection layer, and a planarization layer. The protection layer and the planarization layer are disposed between the thin film transistor and the display element. The display unit includes a display area and a non-display area outside the display area. The non-display area includes a voltage line. The planarization layer includes a dividing region dividing the planarization layer into a center portion and an outer portion. The dividing region surrounds the display area. The voltage line is partially disposed in the dividing region. The protection layer at least covers the sides of the voltage line disposed in the dividing region.
DISPLAY DEVICE
A display device includes: a substrate; and a semiconductor layer including a driving transistor and a fourth transistor on the substrate, wherein a first electrode of the driving transistor is connected to a driving voltage line to receive a driving voltage, a first electrode of the fourth transistor is connected to a first initialization voltage line to receive a first initialization voltage, a second electrode of the fourth transistor is connected to a gate electrode of the driving transistor, a low doping region is between a channel of the fourth transistor and the first electrode of the fourth transistor, and a low doping region is not between the channel of the further transistor and the second electrode of the fourth transistor.
DISPLAY APPARATUS
A display apparatus includes a substrate including at least one hole disposed in a hole area of the substrate, a thin film transistor disposed on the substrate, a light-emitting component disposed on the substrate and electrically connected to the thin film transistor, an insulating layer disposed on the substrate, a thin film encapsulation layer disposed on the substrate, and a laser blocking layer. The substrate includes a display area and a non-display area that is disposed between the display area and the hole area. The laser blocking layer is disposed on the insulating layer in the non-display area.
DISPLAY APPARATUS
A display apparatus includes a substrate including at least one hole disposed in a hole area of the substrate, a thin film transistor disposed on the substrate, a light-emitting component disposed on the substrate and electrically connected to the thin film transistor, an insulating layer disposed on the substrate, a thin film encapsulation layer disposed on the substrate, and a laser blocking layer. The substrate includes a display area and a non-display area that is disposed between the display area and the hole area. The laser blocking layer is disposed on the insulating layer in the non-display area.
Foldable organic light emitting diode display panel and organic light emitting diode display screen
A foldable organic light emitting diode (OLED) display panel and an OLED display screen having the fordable OLED display panel are provided. The foldable OLED display panel is provided with an effective display area and a non-display area. The effective display area has a folding region, a first display area and a second display area. The first display area and the second display area are disposed adjacent two lateral sides of the folding region, respectively. The foldable OLED display panel has a first spacer, a second spacer, and an encapsulation layer having a first organic layer and a first inorganic layer. The first organic layer is coated within the folding region and restricted to the folding region by the first spacer and the second spacer. The first inorganic layer is disposed on the first organic layer and completely covers the effective display area.
ELECTRONIC PANEL AND ELECTRONIC DEVICE HAVING THE SAME
An electronic panel including a display panel and an input sensor which includes a base layer, a first sensing electrode, a first signal line electrically connected to the first sensing electrode, a first insulating layer overlapping the first sensing electrode, a second sensing electrode, a second signal line electrically connected to the second sensing electrode, and a second insulating layer overlapping the second sensing electrode, in which the first insulating layer includes an open edge that defines an open area, the open area exposes a portion of a first surface of the base layer and a portion of the first signal line in a plan view, and the first insulating layer has a first thickness at a first point spaced apart from the open edge and a second thickness greater than the first thickness at a second point disposed farther away from the open edge than the first point.
ELECTRONIC PANEL AND ELECTRONIC DEVICE HAVING THE SAME
An electronic panel including a display panel and an input sensor which includes a base layer, a first sensing electrode, a first signal line electrically connected to the first sensing electrode, a first insulating layer overlapping the first sensing electrode, a second sensing electrode, a second signal line electrically connected to the second sensing electrode, and a second insulating layer overlapping the second sensing electrode, in which the first insulating layer includes an open edge that defines an open area, the open area exposes a portion of a first surface of the base layer and a portion of the first signal line in a plan view, and the first insulating layer has a first thickness at a first point spaced apart from the open edge and a second thickness greater than the first thickness at a second point disposed farther away from the open edge than the first point.
FORMATION OF A TWO-LAYER VIA STRUCTURE TO MITIGATE DAMAGE TO A DISPLAY DEVICE
In some embodiments, the present disclosure relates to a display device. The display device includes an isolation structure disposed over a reflector electrode, an additional electrode disposed over the isolation structure, and an optical emitter structure disposed over the additional electrode. A via structure includes a lower horizontal segment disposed on the reflector electrode, a vertical segment extending along a sidewall of the isolation structure, and an upper horizontal segment disposed over the isolation structure. The upper horizontal segment is connected to the lower horizontal segment by the vertical segment.
DISPLAY APPARATUS
A display apparatus includes: a base substrate including a display area and a non-display area adjacent to the display area; a first power supply wire in the non-display area, a first power supply voltage being applied to the first power supply wire; a second power supply wire in the non-display area and spaced apart from the first power supply wire, a second power supply voltage being applied to the second power supply wire; and a dam overlapping the first power supply wire and the second power supply wire, having a first height on the first power supply wire, and having a second height greater than the first height between the first power supply wire and the second power supply wire.